CXD1968AR
TEST5
Read Only
Offset Address: 0x72
Bit
Name
Description
Default R/W
7:0 TEST5[7:0]
Test use only
Test use only
Test use only
Test use only
—
R
TEST6
Read Only
Offset Address: 0x73
Bit
Name
Description
Default R/W
7:0 TEST6[7:0]
—
R
TEST7
Read/Write
RESET: 0x00
Default R/W
Offset Address: 0x74
Bit
Name
Description
7:0 TEST7[7:0]
00h
R/W
TEST8
Read/Write
RESET: 0xFF
Default R/W
Offset Address: 0x75
Bit
Name
Description
7:0 TEST8[7:0]
FFh
R/W
AUTORCV_1
Read/Write
RESET: 0x29
Default R/W
Offset Address: 0x76
Bit
7
Name
Reserved
Description
0
R/W
Used to define the number of clock periods contained in a 1μs
time interval, for use by the auto-recovery state machine.
Will allow definitions for up to 127MHz logic clock frequencies,
where logic clock frequency = 2 × ADC clock frequency.
6:0 PRESCALE_VAL
29h
R/W
- 78 -
SONY [ SONY CORPORATION ]
