CXD1968AR
BB_PARAMS
Read/Write
RESET: 0xF0
fec_param reset
Default R/W
Offset Address: 0x81
Bit
Name
Description
Determines the sense of TSVALID.
7
Tsvalid_Active_High
1
1
1
R/W
R/W
R/W
0: Active low
1: Active high
Determines the sense of TSSYNC.
6
5
Tssync_Active_High
Tserr_Active_High
0: Active low
1: Active high
Determines the sense of TSERR.
0: Active low
1: Active high
Selects whether TSDATA should be sampled on the positive
or negative edge of TSCLK.
4
3
Latch_on_posedge
Tsclk_204
1
0
R/W
R/W
0: Negative edge
1: Positive edge
Determines the behavior of TSCLK in gated mode (when
Tsclk_full is RESET).
0: TSCLK is active for only the first 188 bytes in the TS
packet.
1: TSCLK is active for all 204 bytes in the TS packet.
Determines the behavior of the TSSYNC output in both
parallel and serial mode.
0: Active only for the first bit in the sync byte (use only in
serial mode)
2
Tssync_byte
0
R/W
1: Active for the entire sync byte (recommended for
parallel or serial modes)
Determines whether TSERR is valid for 204 bytes of the TS
packet or for 188 bytes. Used only when bit 2 is not set.
1
0
Tserr_full
Tsclk_full
0
0
R/W
R/W
0: 188 bytes
1: 204 bytes
Determines whether TSCLK is active continuously or is only
active for valid data.
0: Gated
1: Continuous
Note) It may be necessary to set bit 2 for compatibility with standard MPEG-2 decoders.
BER_PERIOD
Read/Write
RESET: 0x04
Default R/W
Offset Address: 0x83
Bit
Name
Description
7:6 Reserved
00
R/W
Used to configure BEREST block for test.
5
Berest_test_mode
0
R/W
0: Normal mode
1: Test mode
Bit error rate estimation/measurement period.
Min. 0x01, Max. 0x15
Estim./measurement period =
4:0 Ber_Est_Period[4:0]
00100 R/W
2BER_EST_PERIOD × 204-byte packets
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SONY [ SONY CORPORATION ]
