欢迎访问ic37.com |
会员登录 免费注册
发布采购

CXD1185CR 参数 Datasheet PDF下载

CXD1185CR图片预览
型号: CXD1185CR
PDF下载: 下载PDF文件 查看货源
内容描述: 1 SCSI协议控制器 [SCSI 1 Protocol Controller]
分类和应用: 驱动器总线控制器微控制器和处理器外围集成电路数据传输时钟
文件页数/大小: 35 页 / 360 K
品牌: SONY [ SONY CORPORATION ]
 浏览型号CXD1185CR的Datasheet PDF文件第24页浏览型号CXD1185CR的Datasheet PDF文件第25页浏览型号CXD1185CR的Datasheet PDF文件第26页浏览型号CXD1185CR的Datasheet PDF文件第27页浏览型号CXD1185CR的Datasheet PDF文件第29页浏览型号CXD1185CR的Datasheet PDF文件第30页浏览型号CXD1185CR的Datasheet PDF文件第31页浏览型号CXD1185CR的Datasheet PDF文件第32页  
CXD1185CQ/CR  
<Command phase execution>  
Switching to the command phase  
Wait until the target device switches the SCSI bus to the command phase (PHC bit set to “1”).  
9
10 Command send  
Set the number of command bytes in the transfer byte counter. Write “Transfer Information” command  
into the command register. (this time set the TRBE bit to “1” and DMA bit to “0”). Write the command  
bytes into the SCSI data register. After confirming that the CIP bit is set to “0”, read interrupt request  
registers 1 and 2.  
<Data-in phase execution>  
11 Switching to the data-in phase  
Wait until the target device switches the SCSI bus to the data-in phase (PHC bit set to “1”).  
12 Data receive  
Set the number of data bytes received in the transfer byte counter. Write “Transfer Information”  
command into the command register (with both DMA bit and TRBE bit set to “1”).  
Note that programming of DMA controller is also required starting DMA transfer. After confirming that the  
CIP bit is set to “0”, read interrupt request registers 1 and 2.  
<Status phase execution>  
13 Switching to the status phase  
Wait until the target devices switches the SCSI bus to the status phase (PHC bit set to “1”).  
14 Status receive  
Write “Transfer Information” command in the command register (both DMA bit and TRBE bit are “0”).  
After confirming that the CIP bit is set to “0”, read interrupt request registers 1 and 2.  
The status byte is read from the data register.  
<Message-in phase execution>  
15 Switching to the message-in phase  
Wait until the target device switches the SCSI bus to the message-in phase (PHC bit set to “1”).  
16 Message receive  
Write “Transfer Information” command in the command register (both DMA bit and TRBE bit are “0”).  
After confirming that the CIP bit is set to “0”, read interrupt request registers 1 and 2. The message byte  
is read from the data register.  
17 Halting ACK signal drive  
Write “Deassert ACK” command in the command register to inactivate ACK signal. After confirming that  
the CIP bit is “0”, read the interrupt request registers 1 and 2.  
<Disconnect>  
18 Wait until the DCNT bit is set to “1”.  
All SCSI phases are covered in 1-17 above.  
If a disconnect message is sent from the target device when in the data phase, the status phase is  
skipped and processing continues with the message in phase. When reselection is performed from the  
target device (RSL bit set to “1”), it is necessary to wait until the FNC bit is set to “1”. Then read the  
monitor SCSI control register and perform the processing appropriate for the current SCSI phase.  
—28—  
 复制成功!