CXD1185CQ/CR
<Status phase execution>
13 ACK signal confirmation
It is necessary to confirm that MACK bit in the SCSI control monitor register is “0”.
14 Send status byte
Write “Send Status” (both DMA and TRBE bits are “0”) command in the command register. Wait until the
phase on the SCSI bus changes to status phase (monitor SCSI control monitor register). Write the status
byte in the data register. When CIP is “0”, read interrupt request registers 1 and 2.
NOTE:
In target mode, when all the following conditions are met, it is necessary to monitor and confirm the
change in the SCSI bus phase before writing anything in the data register.
1. The command causes a change in the data transfer direction from out to in (e.g. from data out phase
to status phase)
2. The command is not executed in DMA mode.
<Message in phase execution>
15 ACK signal confirmation
It is necessary to confirm that MACK bit in the SCSI control monitor register is “0”.
16 Send message
Write “Send Message” (both DMA and TRBE bits are “0”) command in the command register. If this
command causes a change in the data transfer direction from in to out, wait until the phase on the SCSI
bus changes to message in phase. Write the message byte in the data register. When CIP is “0”, read
interrupt request registers 1 and 2.
<Disconnect>
17 ACK signal confirmation
It is necessary to confirm that MACK bit in the SCSI control monitor register is “0”.
18 Disconnect execution
Write “Disconnect” command in the command register. When CIP is “0”, read interrupt request registers
1 and 2.
To perform disconnect during data phase, skip status phase and perform message-in phase sequence.
To perform reselection, it is necessary to execute “Reselect” command.
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