欢迎访问ic37.com |
会员登录 免费注册
发布采购

USB3320C-EZK 参数 Datasheet PDF下载

USB3320C-EZK图片预览
型号: USB3320C-EZK
PDF下载: 下载PDF文件 查看货源
内容描述: 高度集成的全功能高速USB 2.0 ULPI收发器 [Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver]
分类和应用: 电信集成电路PC
文件页数/大小: 82 页 / 1397 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号USB3320C-EZK的Datasheet PDF文件第32页浏览型号USB3320C-EZK的Datasheet PDF文件第33页浏览型号USB3320C-EZK的Datasheet PDF文件第34页浏览型号USB3320C-EZK的Datasheet PDF文件第35页浏览型号USB3320C-EZK的Datasheet PDF文件第37页浏览型号USB3320C-EZK的Datasheet PDF文件第38页浏览型号USB3320C-EZK的Datasheet PDF文件第39页浏览型号USB3320C-EZK的Datasheet PDF文件第40页  
Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver  
Datasheet  
Note: The IdGnd switch has been provided to ground the ID pin for future applications.  
5.6.2  
VBUS Monitor and Pulsing  
The USB3320 includes all of the VBUS comparators required for OTG. The VBUSVld, SessVld, and  
SessEnd comparators shown in Figure 5.11 are fully integrated into the USB3320. These comparators  
are used to monitor changes in the VBUS voltage, and the state of each comparator can be read from  
the USB Interrupt Status register.  
The VbusVld comparator is used by the Link, when configured as an A device, to ensure that the  
VBUS voltage on the cable is valid. The SessVld comparator is used by the Link when configured as  
both an A or B device to indicate a session is requested or valid. Finally the SessEnd comparator is  
used by the B-device to indicate a USB session has ended.  
Also included in the VBUS Monitor and Pulsing block are the resistors used for VBUS pulsing in SRP.  
The resistors used for VBUS pulsing include a pull-down to ground and a pull-up to VDD33.  
In some applications, voltages much greater than 5.5V may be present at the VBUS pin of the USB  
connector. The USB3320 includes an overvoltage protection circuit that protects the VBUS pin of the  
USB3320 from excessive voltages as described in Section 5.6.2.6, and shown in Figure 5.11.  
~
~
VDD33  
ChrgVbus  
0.5V  
SessEnd  
en  
SessEnd Rise or  
SessEnd Fall  
SessValid  
VBUS  
Overvoltage  
Protection  
1.4V  
VBUS  
To USB Con.  
RVBUS  
VbusValid  
4.575V  
en  
DischrgVbus  
VbusValid Rise or  
VbusValid Fall  
[0, X]  
[1, 0]  
[1, 1]  
RXCMD VbusValid  
EXTVBUS (logic 1)  
IndicatorComplement  
[UseExternalVbusindicator, IndicatorPassThru]  
SMSC PHY  
~
~
Figure 5.11 USB3320 OTG VBUS Block  
SessEnd Comparator  
5.6.2.1  
The SessEnd comparator is designed to trip when VBUS is less than 0.5 volts. When VBUS goes  
below 0.5 volts the USB session is considered to be ended, and SessEnd will transition from 0 to 1.  
The SessEnd comparator can be disabled by clearing this bit in both the USB Interrupt Enable Rising  
and USB Interrupt Enable Falling registers. When disabled, the SessEnd bit in the USB Interrupt Status  
register will read 0. The SessEnd comparator trip points are detailed in Table 4.7.  
Revision 1.0 (07-14-09)  
SMSC USB3320  
DATA3S6HEET  
 复制成功!