BIT NO.
BIT NAME
DESCRIPTION
7
UART Speed This bit enables the high speed mode of UART 2.
1 = High speed enabled
0 = Standard (default)
7.3.14 CR0D
CR0D can only be accessed in the configuration state and after the CSR has been initialized to 0DH. This register is
read only. CR0D contains the SP37E760 Device ID. The default value of this register after power up is 28H.
7.3.15 CR0E
CR0E can only be accessed in the configuration state and after the CSR has been initialized to 0EH. This register is
read only. CR0E contains the current SP37E760 Chip Revision Level.
7.3.16 CR0F
CR0F can only be accessed in the configuration state and after the CSR has been initialized to 0FH. The default
value of this register after power up is 00H (Table 36). CR0F is a test control register and all bits must be treated as
Reserved. Note: all test modes are reserved for SMSC use. Activating test mode registers may produce undesired
results.
Table 36 - CR0F
BIT NO.
BIT NAME
Test 0
Test 1
Test 2
Test 3
Test 4
Test 5
Test 6
Test 7
DESCRIPTION
0
1
2
3
4
5
6
7
RESERVED FOR SMSC USE
7.3.17 CR10
CR10 can only be accessed in the configuration state and after the CSR has been initialized to 10H. The default
value of this register after power up is 00H (Table 37) CR10 is a test control register and all bits must be treated as
Reserved. NOTE: all test modes are reserved for SMSC use. Activating test mode registers may produce undesired
results.
Table 37 - CR10
BIT NAME
Test 8
BIT NO.
DESCRIPTION
0
1
2
3
4
5
6
7
Test 9
Test 10
Test 11
Test 12
Test 13
Test 14
Test 15
RESERVED FOR SMSC USE
7.3.18 CR11
CR11 can only be accessed in the configuration state and after the CSR has been initialized to 11H. The default
value of this register after power up is 80H (Table 38). CR11 is a test control register and all bits must be treated as
SMSC DS – SP37E760
Page 53
Rev. 04/13/2001
SMSC [ SMSC CORPORATION ]
