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LPC47M182-NR 参数 Datasheet PDF下载

LPC47M182-NR图片预览
型号: LPC47M182-NR
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的I / O控制器,主板胶合逻辑 [ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC]
分类和应用: 控制器
文件页数/大小: 223 页 / 1215 K
品牌: SMSC [ SMSC CORPORATION ]
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Advanced I/O Controller with Motherboard GLUE Logic  
Datasheet  
Chapter 5 Power and Clock Functionality  
The LPC47M182 has three power planes: VCC, VTR and V5P0_STBY.  
5.1  
3 Volt Operation / 5 Volt Tolerance  
The LPC47M182 is a 3.3 Volt part. It is intended solely for 3.3V applications. Non-LPC bus pins are 5V  
tolerant; that is, the operating input voltage is 5.5V max, and the I/O buffer output pads are backdrive  
protected (they do not impose a load on any external VCC powered circuitry).  
The LPC interface pins are 3.3 V only. These signals meet PCI DC specifications for 3.3V signaling. The  
nRSMRST pin is also 3.3V only.  
The following lists the pins that are 3.3V only (not 5V tolerant):  
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LAD[3:0]  
nLFRAME  
nLDRQ  
nLPCPD  
nRSMRST  
The input voltage for all other pins is 5.5V max. These pins include all non-LPC Bus pins and the following  
pins:  
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nPCI_RESET  
PCI_CLK  
SER_IRQ  
nIO_PME  
5.2  
5.3  
VCC Power  
The LPC47M182 is a 3.3 Volt part. The VCC supply is 3.3 Volts (nominal). See section 12.2 Operational  
DC Characteristics and section 12.1 Maximum Guaranteed Ratings.  
VTR Power  
The LPC47M182 requires a trickle supply (VTR) to provide sleep current for the programmable wake-up  
events in the PME interface and other suspend state logic when VCC is removed. The VTR supply is 3.3  
Volts (nominal). See the Operational Description Section. The maximum VTR current that is required  
depends on the functions that are used in the part. See Trickle Power Functionality subsection and  
Maximum Current Values subsection. If the LPC47M182 is not intended to provide wake-up and/or  
suspend power capabilities on standby current, VTR can be connected to VCC. The VTR pin generates a  
VTR Power-on-Reset signal to initialize these components.  
Note:  
If VTR is to be used for programmable wake-up events when VCC is removed, VTR must be at its full  
minimum potential at least 10 µs before VCC begins a power-on cycle. When VTR and VCC are fully  
powered, the potential difference between the two supplies must not exceed 500mV.  
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)  
30  
SMSC LPC47M182  
DATASHEET  
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