Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
NAME
FDC Mapping
Register
REG INDEX
DEFINITION
0xF8 R/W Bit[0] – Tri-state Control. This bit maps to Bit[7] FDC
Output Control in the FDC Mode Register (0xF0).
= 0
= 1
FDC outputs active (default)
FDC outputs tri-Stated
Default = 0x24
on VCC POR,
VTR POR and
HARD RESET
Bit[1] Reserved
Bit[2] PC-AT or PS/2 Drive Mode Select. This bit
maps to Bit[3] Interface Mode in the FDC Mode
Register (0xF0).
= 0
= 1
PS/2
AT Mode (default)
Note: only two out of three modes in the FDC Mode
Register are mapped. Although retained, the model
30 mode cannot be selected via 0xF8.
Bit[3] Write Protect (Software). This bit maps to Bit[0]
Forced Write Protect in the FDD Option Register
(0xF1).
= 0
= 1
Inactive (default)
Write protected
Bit[4] Reserved
Bit[5] Density Select. This bit maps to Bits[3:2]
Density Select in the FDD Option Register (0xF1) with
inversion. A write of ‘0’ on Bit[5] will force Bits[3:2] in
the FDD Option Register to “11”. Similarly, a write of
‘1’ will force Bits[3:2] in the FDD Option Register to
“00”.
= 0
= 1
forced to logic “0”
Normal (default)
Bit[6] Floppy Mode. This bit maps to Bit[0] Floppy
Mode in the FDC Mode Register (0xF0).
= 0
= 1
Normal Floppy Mode (default)
Enhanced Floppy Mode 2 (OS2)
Bit[7] Reserved
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
186
SMSC LPC47M182
DATASHEET
SMSC [ SMSC CORPORATION ]
