Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Table 11.12 – Serial Port 1 Logical Device Configuration Registers
NAME
REG
DEFINITION
INDEX
Serial Port 1 Mode
Register
0xF0 R/W Bit[0] MIDI Mode
= 0
= 1
MIDI support disabled (default)
MIDI support enabled
Default = 0x00
on VCC POR,
VTR POR and
HARD RESET
Bit[1] High Speed
= 0
= 1
High Speed Disabled(default)
High Speed Enabled
Bit[6:2] Reserved, set to zero
Bit[7] Share IRQ
=0 UARTS use different IRQs
=1 UARTS share a common IRQ
See Note 1 below.
Note 1: To properly share and IRQ,
1. Configure UART1 (or UART2) to use the desired IRQ.
2. Configure UART2 (or UART1) to use No IRQ selected.
3. Set the share IRQ bit.
Note: If both UARTs are configured to use different IRQs and the share IRQ bit is set, then both of the UART IRQs
will assert when either UART generates an interrupt.
SMSC LPC47M182
189
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)
DATASHEET
SMSC [ SMSC CORPORATION ]
