Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Table 3.5 Dedicated Configuration Strap Pins (continued)
BUFFER
TYPE
PIN
NAME
SYMBOL
DESCRIPTION
Port 1 Full-
Duplex Flow
Control
FD_FC_1
IS
(PU)
Note 3.8
Port 1 Full-Duplex Flow Control Enable Strap:
Configures the default value of the Port 1 Full-
Duplex Transmit Flow Control Enable (TX_FC_1)
and Port 1 Full-Duplex Receive Flow Control
Enable (RX_FC_1) bits in the Port 1 Manual Flow
Control Register (MANUAL_FC_1), which are used
when manual full-duplex control is selected. When
latched low, full-duplex Pause packet detection and
generation are disabled. When latched high, full-
duplex Pause packet detection and generation are
enabled. See Note 3.9.
Enable Strap
50
MANUAL_FC_1
Port 1
Manual Flow
IS
(PU)
Note 3.8
Port 1 Manual Flow Control Enable Strap:
Configures the default value of the Port 1 Full-
Duplex Manual Flow Control Select
Control
(MANUAL_FC_1) bit in the Port 1 Manual Flow
Control Register (MANUAL_FC_1). When latched
low, flow control is determined by auto-negotiation.
When latched high, flow control is determined by
the Port 1 Full-Duplex Transmit Flow Control
Enable (TX_FC_1) and Port 1 Full-Duplex Receive
Flow Control Enable (RX_FC_1) bits. See
Note 3.9.
Enable Strap
49
AUTO_MDIX_2
AUTO_NEG_2
Port 2 Auto-
MDIX Enable
Strap
IS
(PU)
Note 3.8
Port 2 Auto-MDIX Enable Strap: Configures the
default value for the Auto-MDIX functionality on
Port 2. When latched low, Auto-MDIX is disabled.
When latched high, Auto-MDIX is enabled. See
Note 3.9.
43
42
Port 2 Auto
Negotiation
Enable Strap
IS
(PU)
Note 3.8
Port 2 Auto Negotiation Enable Strap:
Configures the default value for the Auto-
Negotiation (PHY_AN) enable bit in the
PHY_BASIC_CTRL_2 register (See
Section 13.2.2.1). When latched low, auto-
negotiation is disabled. When latched high, auto-
negotiation is enabled. See Note 3.9.
Port 2 Speed
Select Strap
SPEED_2
IS
(PU)
Note 3.8
Port 2 Speed Select Strap: Configures the default
value for the Speed Select LSB
(PHY_SPEED_SEL_LSB) bit in the
PHY_BASIC_CTRL_2 register (See
Section 13.2.2.1). When latched low, 10 Mbps is
selected. When latched high, 100 Mbps is selected.
See Note 3.9.
41
Port 2 Duplex
Select Strap
DUPLEX_2
BP_EN_2
IS
(PU)
Note 3.8
Port 2 Duplex Select Strap: Configures the
default value for the Duplex Mode (PHY_DUPLEX)
bit in the PHY_BASIC_CTRL_2 register (See
Section 13.2.2.1). When latched low, half-duplex is
selected. When latched high, full-duplex is
selected. See Note 3.9.
38
37
Port 2
Backpressure
Enable Strap
IS
(PU)
Note 3.8
Port 2 Backpressure Enable Strap: Configures
the default value for the Port 2 Backpressure
Enable (BP_EN_2) bit of the Port 2 Manual Flow
Control Register (MANUAL_FC_2). When latched
low, backpressure is disabled. When latched high,
backpressure is enabled. See Note 3.9.
Revision 1.2 (04-08-08)
SMSC LAN9313/LAN9313i
DATA3S4HEET
SMSC [ SMSC CORPORATION ]
