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LAN9313I 参数 Datasheet PDF下载

LAN9313I图片预览
型号: LAN9313I
PDF下载: 下载PDF文件 查看货源
内容描述: 三端口10/100管理型以太网交换机MII [Three Port 10/100 Managed Ethernet Switch with MII]
分类和应用: 以太网局域网(LAN)标准
文件页数/大小: 398 页 / 4083 K
品牌: SMSC [ SMSC CORPORATION ]
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Three Port 10/100 Managed Ethernet Switch with MII  
Datasheet  
Table 3.4 LAN Port 0(External MII) Pins (continued)  
BUFFER  
TYPE  
PIN  
NAME  
SYMBOL  
DESCRIPTION  
MII Receive  
Data Valid  
RXDV  
IS/O8  
(PD)  
Note 3.3  
MII Receive Data Valid: Indicates valid data on  
RXD[3:0].  
„ In MAC mode, this signal is input from an  
11  
external PHY.  
„ In PHY mode, this signal is output to an external  
MAC. See Note 3.3.  
MII Receive  
Clock  
RXCLK  
IS/O12  
(PD)  
MII Receive Clock:  
Note 3.3 „ In MAC mode, this is the receiver clock input from  
an external PHY.  
10  
„ In PHY mode, this is the receiver clock output to  
an external MAC. See Note 3.3.  
MII  
Management  
Data  
MDIO  
IS/O8  
Note 3.5  
MII Management Data:  
„ In SMI/MII slave management modes, this signal  
is the management data to/from an external  
master.  
12  
„ In MII master management modes, this signal is  
the management data to/from an external PHY.  
See Note 3.5  
MII  
MDC  
IS/O8  
Note 3.6  
MII Management Clock:  
Management  
Clock  
„ In SMI/MII slave management modes, this is the  
management clock input from an external master.  
15  
„ In MII master management modes, this is the  
management clock output to an external PHY.  
See Note 3.6.  
MII Port  
Duplex  
MII_DUPLEX  
IS  
(PU)  
Note 3.7  
MII Port Duplex: This pin sets the duplex of the  
MII port. Its’ value can be changed at any time (live  
value) and can be overridden by disabling the  
Auto-Negotiation (VPHY_AN) bit in the Virtual PHY  
Basic Control Register (VPHY_BASIC_CTRL) of  
the Virtual PHY.  
In MAC mode, this signal is typically tied to the  
duplex indication from the external PHY.  
60  
In PHY mode, this signal is typically tied high or low  
as needed.  
The polarity of this signal depends upon the  
duplex_pol_strap_mii strap. If duplex_pol_strap_mii  
is 0, a MII_DULPEX value of 0 indicates full duplex,  
and 1 indicates half duplex. If duplex_pol_strap_mii  
is 1, a MII_DULPEX value of 1 indicates full duplex,  
and 0 indicates half duplex.  
Note 3.3 When used as an output, the pin(s) input buffer(s) and pull-down(s) are disabled.  
Revision 1.2 (04-08-08)  
SMSC LAN9313/LAN9313i  
DATA3S2HEET  
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