High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Table 14.3 Switch Fabric CSR to SWITCH_CSR_DIRECT_DATA Address Range Map (continued)
SWITCH FABRIC CSR
REGISTER #
SWITCH_CSR_DIRECT_DATA
ADDRESS
REGISTER NAME
MAC_TX_CFG_2
MAC_TX_FC_SETTINGS_2
MAC_IMR_2
0C40h
0C41h
22Ch
230h
234h
0C80h
Switch Engine CSRs
1800h
SWE_ALR_CMD
SWE_ALR_WR_DAT_0
SWE_ALR_WR_DAT_1
SWE_ALR_CFG
238h
23Ch
240h
244h
248h
24Ch
250h
254h
258h
25Ch
260h
264h
268h
26Ch
270h
274h
278h
27Ch
280h
284h
288h
28Ch
290h
294h
1801h
1802h
1809h
SWE_VLAN_CMD
180Bh
SWE_VLAN_WR_DATA
SWE_DIFFSERV_TBL_CMD
SWE_DIFFSERV_TBL_WR_DATA
180Ch
1811h
1812h
SWE_GLB_INGRESS_CFG
SWE_PORT_INGRESS_CFG
SWE_ADMT_ONLY_VLAN
SWE_PORT_STATE
1840h
1841h
1842h
1843h
SWE_PRI_TO_QUE
1845h
SWE_PORT_MIRROR
SWE_INGRESS_PORT_TYP
1846h
1847h
SWE_BCST_THROT
SWE_ADMT_N_MEMBER
SWE_INGRESS_RATE_CFG
SWE_INGRESS_RATE_CMD
SWE_INGRESS_RATE_WR_DATA
SWE_INGRESS_REGEN_TBL_MII
SWE_INGRESS_REGEN_TBL_1
SWE_INGRESS_REGEN_TBL_2
1848h
1849h
184Ah
184Bh
184Dh
1855h
1856h
1857h
SWE_IMR
1880h
Buffer Manager (BM) CSRs
1C00h
BM_CFG
298h
29Ch
2A0h
BM_DROP_LVL
BM_FC_PAUSE_LVL
1C01h
1C02h
SMSC LAN9312
241
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
