High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
BITS
DESCRIPTION
CSR Byte Enable (CSR_BE[3:0])
TYPE
DEFAULT
19:16
R/W
0h
This field is a 4-bit byte enable used for selection of valid bytes during write
operations. Bytes which are not selected will not be written to the
corresponding Switch Engine CSR.
CSR_BE[3] corresponds to register data bits [31:24]
CSR_BE[2] corresponds to register data bits [23:16]
CSR_BE[1] corresponds to register data bits [15:8]
CSR_BE[0] corresponds to register data bits [7:0]
Typically all four byte enables should be set for auto increment and auto
decrement operations.
15:0
CSR Address (CSR_ADDR[15:0])
R/W
00h
This field selects the 16-bit address of the Switch Fabric CSR that will be
accessed with a read or write operation. Refer to Table 14.12, “Indirectly
Accessible Switch Control and Status Registers,” on page 308 for a list of
Switch Fabric CSR addresses.
SMSC LAN9312
237
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
