Soft Power Mangement
nBINT
Delay2
OFF_EN
nSPOFF1
Logic
OFF_DLY
Button
nSPOFF
L
VTR_POR_EN
VTR POR
Logic
AL2_REM_EN
Alarm 2
Button Input
ED; PG
ED; L
OFF_DLY
Delay1
SP1
Vcc
EN1
Flip
Flop
1
nSPOFF1
nPowerOn
D
Q
CLR
SPx
Open Collector
Type output
ED; L
VBAT POR
ENx
Logic
nSPOFF1
Soft Power
Off nSPOFF1
A transition on the Button input or on any enabled SPx inputs
causes the nPowerOn output to go active low.
A low pulse on the Soft Power Off signal causes the nPowerOn bit to float.
ED;PG = Edge Detect, Pulse Generator
ED;L = Edge Detect and Latch
FIGURE 9 - SOFT POWER MANAGEMENT FUNCTIONAL DIAGRAM
Notes:
All soft power management functions run off of VTR. When VTR is present, it supplies power to the
RTC. When VTR is not present, Vbat supplies power to the RTC and Flip Flop 1.
Flip Flop 1 is battery backed-up so that it returns the last valid state of the machine.
A battery backed-up enable bit in the alarm control register can be set to force Flip Flop 1 in the soft
power management circuit to come up ‘on’ if an alarm occurred when VTR was not present. This is
gated into wakeup circuitry. Refer to the AL2_REM_EN Bit description in the RTC Control Register
section for more information.
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