1. The Divider Chain Controls (bits 6-4) are in
any mode but Normal Operation ("010").
2. The VRT bit is a "0".
3. When battery voltage is below 1 volt
nominal and RESET_DRV is a "1". This
will also initialize all registers 00-0D to a
"00".
Power Supply Operational Modes
Note: See the Operational Description section
for the power supply operational modes.
Power Management
The RAMD signal controls all bus inputs to the
RTC and RAM (nIOW, nIOR, RESET_DRV).
When asserted, it disallows any modification of
the RTC and RAM data by the host or 8042.
RAMD is asserted whenever: VCC is below 4.0
volts nominal.
To minimize power consumption, the oscillator
is not operational under the following conditions:
4. The Divider Chain Controls (bits 6-4) are in
Oscillator Disabled mode (000, or 001).
5. If VTR & VCC=0 and the battery power is
removed and then re-applied (a new battery
is installed) the following occurs:
When the VTR voltage drops below the battery
voltage, the RTC switches to battery power.
When VTR rises above the battery voltage, the
RTC switches back to VTR power.
a. The oscillator is disabled immediately.
b. Initialize all registers 00-0D to a "00"
when VCC is applied.
When the VCC voltage drops below 4.0 volts
nominal, all inputs are locked out so that the
internal registers cannot be modified by the
system. This lockout condition continues for 62
msec (min) to 125 msec (max) after the system
power has been restored. The 62 msec lockout
does not occur under the following conditions:
If the battery voltage is between 1 volt nominal
and 2.4 volt nominal when VCC is applied:
6. Clear VRT bit to "0". Maintain all other RTC
bits in the state as before VCC was applied
VCC
<4.0
>4.0
HYSTER
BATTERY
REGISTER ACCESS
1
0
1
x
N
Y
Hyster = 1 implies that VCC <4.0 volts +/-0.25V; Hyster=0 implies that VCC >4.0 volts +/-0.25V.
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