Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features
Datasheet
7.2.34
Register 89h: SMSC Test Register
Register
Address
Read/
Write
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSb)
(LSb)
89h
R
SMSC Test Register
TST7
TST6
TST5
TST4
TST3
TST2
TST1
TST0
N/A
7.2.35
Registers 8Ah: SMSC Test Register
Register
Address
Read/
Write
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSb)
(LSb)
8Ah
R
SMSC Test Register
RES
TST6
TST5
TST4
TST3
TST2
TST1
TST0
4Dh
7.2.36
Registers 8Bh: SMSC Test Register
Register
Address
Read/
Write
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSb)
(LSb)
8Bh
R/W
SMSC Test Register
RES
TST6
TST5
TST4
TST3
TST2
TST1
TST0
4Dh
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
This register must not be written. Writing this register may produce unexpected results.
7.2.37
Registers 8Ch: SMSC Test Register
Register
Address
Read/
Write
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSb)
(LSb)
8Ch
R
SMSC Test Register
RES
RES
RES
TST4
TST3
TST2
TST1
TST0
0Eh
7.2.38
Registers 8Dh: SMSC Test Register
Register
Address
Read/
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Write
(MSb)
(LSb)
8Dh
R/W
SMSC Test Register
RES
RES
RES
TST4
TST3
TST2
TST1
TST0
0Eh
This register becomes read only when the Lock bit is set. Any further attempts to write to this register
shall have no effect.
This register must not be written. Writing this register may produce unexpected results.
7.2.39
Registers 8Eh: SMSC Test Register
Register
Address
Read/
Write
Bit 7
Bit 0
Default
Value
Register Name
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(MSb)
(LSb)
8Eh
R
SMSC Test Register
TST7
TST6
TST5
TST4
TST3
TST2
TST1
TST0
N/A
SMSC EMC6D102
Revision 0.4 (04-05-05)
DATA7S3HEET