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EMC6D102-CK 参数 Datasheet PDF下载

EMC6D102-CK图片预览
型号: EMC6D102-CK
PDF下载: 下载PDF文件 查看货源
内容描述: 风扇控制装置与硬件监控和声学降噪功能 [Fan control Device with Hardware Monitoring and Acoustic Noise Reduction Features]
分类和应用: 运动控制电子器件风扇信号电路装置光电二极管电动机控制监控
文件页数/大小: 86 页 / 1523 K
品牌: SMSC [ SMSC CORPORATION ]
 浏览型号EMC6D102-CK的Datasheet PDF文件第63页浏览型号EMC6D102-CK的Datasheet PDF文件第64页浏览型号EMC6D102-CK的Datasheet PDF文件第65页浏览型号EMC6D102-CK的Datasheet PDF文件第66页浏览型号EMC6D102-CK的Datasheet PDF文件第68页浏览型号EMC6D102-CK的Datasheet PDF文件第69页浏览型号EMC6D102-CK的Datasheet PDF文件第70页浏览型号EMC6D102-CK的Datasheet PDF文件第71页  
Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features  
Datasheet  
7.2.23  
Register 6F: XOR Test Register  
Register  
Address  
Read/  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Write  
(MSb)  
(LSb)  
6Fh  
R/W  
XOR Test Register  
RES  
RES  
RES  
RES  
RES  
RES  
RES  
XEN  
00h  
This register becomes read only when the Lock bit is set. Any further attempts to write to this register  
shall have no effect.  
The part incorporates an XOR tree test mode. When the test mode is enabled by setting the ‘XEN’ bit  
high via SMBus, the part enters XOR test mode.  
The following signals are included in the XOR test tree:  
VID0, VID1, VID2, VID3, VID4  
TACH1, TACH2, TACH3, TACH4  
PWM2, PWM3  
Since the test mode is XOR tree, the order of the signals in the tree is not important. SDA and SCL  
are not included in the test tree.  
7.2.24  
Register 79h: SMSC Test Register  
Register  
Address  
Read  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
/Write  
(MSb)  
(LSb)  
79h  
R/W  
SMSC Test Register  
TST7  
TST6  
TST5  
TST4 TST3 TST2  
TST1  
TST0  
00h  
This is a read/write register. Writing this register may produce unwanted results.  
This register becomes read only when the Lock bit is set. Any further attempts to write to this register  
shall have no effect.  
7.2.25  
Register 7Ah: SMSC Test Register  
Register  
Address  
Read/  
Write  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
(MSb)  
(LSb)  
7Ah  
R
SMSC Test Register  
RES  
TST6  
TST5  
TST4  
TST3  
TST2  
TST1  
TST0  
00h  
This is a read/write register. Writing this register may produce unwanted results.  
7.2.26  
Register 7Bh: SMSC Test Register  
Register  
Address  
Read/  
Write  
Bit 7  
Bit 0  
Default  
Value  
Register Name  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
(MSb)  
(LSb)  
7Bh  
R/W  
SMSC Test Register  
TST7  
TST6  
TST5  
TST4  
TST3  
TST2  
TST1  
TST0  
00h  
This is a read/write register. Writing this register may produce unwanted results.  
These registers become read only when the Lock bit is set. Any further attempts to write to these  
registers shall have no effect.  
SMSC EMC6D102  
Revision 0.4 (04-05-05)  
DATA6S7HEET