Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
7.9.8
8051 Hibernation Timer Register
Table 7.34 HTIMER Register
N/A
HOST ADDRESS
8051 ADDRESS
POWER
0x7FF3
VCC1
0x00
DEFAULT
Hibernation Timer - This 8 bit binary count-down timer can be programmed from 30 seconds to 128
minutes in 30 second increments. When it expires (reaches “0”), it stops (remains at “0”) and causes
a hardware event that will wake up the 8051. This timer is clocked by the 32 KHz clock and is powered
by VCC1. Writing a non-zero value to this register starts the counter from that value.
7.9.9
8051 Edge Select Registers
There are six Edge Select Registers. The assertion of the corresponding interrupt is controlled by a two
bit field as shown inTable 7.36.
Selectable Edge interrupts
Selectable interrupts SE04, SE06, and SE07 are on External INT2.
Selectable interrupts SE10, SE12, SE13, SE15-SE17 are on External INT3.
Selectable interrupts SE20-SE23, SE25-SE27 are on External INT4.
Table 7.35 Edge Select 4A
N/A
HOST ADDRESS
8051 ADDRESS
POWER
0x7F57
VCC1
0x00
DEFAULT
BIT
D7:6
D5:4
D3:2
D1:0
-
-
-
-
HOST TYPE
8051 R/W
BIT NAME
R/W
R/W
R
R
SE03 Select
SE02 Select
Reserved
Reserved
USER’S NOTE: Edge-generated interrupts may occur from a change in the edge select bits.
Revision 1.1 (01-14-03)
SMSC LPC47N350
DATA7S8HEET
SMSC [ SMSC CORPORATION ]
