Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table B.8 CKCON Register Bit Descriptions
BIT
SPC_FNC.7-1
SPC_FNC.0
FUNCTION
Reserved
WRS. Select RAM write strobe
0 = mem_wr_n
1 = mem_pswr_n
This bit allows writes to 8051 code space using the alternate write strobe
mem_pswr_n.
B.3.6
MPAGE
The MPAGE special function register (Table B.9) replaces the function of the Port 2 latch in the
LPC47N350. During MOVX A, @Ri and MOVX @Ri, A instructions, the 8051 places the contents of
the MPAGE register on the upper eight address bits. This provides the paging function that is normally
provided by the Port 2 latch.
Table B.9 MPAGE Register - SFR 92H
92H
SFR ADDRESS
POWER
VCC1
0x00
DEFAULT
BIT
D7
D6
R/W
D5
R/W
D4
R/W
D3
R/W
D2
R/W
D1
R/W
D0
R/W
R/W
A15
TYPE
A14
A13
A12
A11
A10
A9
A8
BIT NAME
B.3.7
T2CON
The T2CON register is used to configure Timer 2
Table B.10 T2CON Register - SFR C8H
C8h
SFR ADDRESS
POWER
VCC1
0x00
DEFAULT
BIT
D7
D6
R/W
D5
R/W
D4
R/W
D3
R/W
D2
D1
D0
R/W
R/W
R/W
TR2
R/W
TYPE
TF2
Reserved
RCLK
TCLK
Reserved
Reserved
BIT NAME
SMSC LPC47N350
321
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
