Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table B.15 TH2 Register - SFR CDH
CDh
SFR ADDRESS
POWER
VCC1
0x00
DEFAULT
BIT
D7
D6
R/W
D5
R/W
D4
R/W
D3
R/W
D2
R/W
D1
R/W
D0
R/W
R/W
TYPE
CV15
CV14
CV13
CV12
CV11
CV10
CV9
CV8
BIT NAME
B.3.12 EXIF
The EXIF register contains the external interrupt flags for the extended interrupt unit.
Table B.16 EXIF Register - SFR 91H
91h
SFR ADDRESS
POWER
VCC1
0x08
DEFAULT
BIT
D7
D6
R/W
D5
R/W
D4
R/W
D3
R/W
D2
R/W
D1
R/W
D0
R/W
R/W
IE5
TYPE
IE4
IE3
IE2
Reserved
BIT NAME
Table B.17 EXIF Register Bit Descriptions
FUNCTION
BIT
EXIF.7
IE5 External Interrupt 5 flag. IE5 = 1 indicates a falling edge was detected at the
int5_n pin. IE5 must be cleared by software. Setting IE5 in software generates an
interrupt, if enabled.
EXIF.6
EXIF.5
EXIF.4
IE4 External Interrupt 4 flag. IE4 = 1 indicates a rising edge was detected at the
int4 pin. IE4 must be cleared by software. Setting IE4 in software generates an
interrupt, if enabled.
IE3 External Interrupt 3 flag. IE3 = 1 indicates a falling edge was detected at the
int3_n pin. IE3 must be cleared by software. Setting IE3 in software generates an
interrupt, if enabled.
IE2 External Interrupt 2 flag. IE2 = 1 indicates a rising edge was detected at the
int2 pin. IE2 must be cleared by software. Setting IE2 in software generates an
interrupt, if enabled.
Revision 1.1 (01-14-03)
324
SMSC LPC47N350
DATASHEET
SMSC [ SMSC CORPORATION ]
