Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table B.17 EXIF Register Bit Descriptions (continued)
FUNCTION
BIT
EXIF.3
Reserved. Read as ‘1’.
Reserved. Read as ‘0’.
EXIF.2-0
B.3.13 EICON
The EICON register contains pfi and serial port 1 controls for the extended interrupt unit.
Table B.18 EICON Register - SFR D8H
D8h
SFR ADDRESS
POWER
VCC1
0x40
DEFAULT
BIT
D7
D6
R/W
D5
R/W
D4
R/W
D3
R/W
D2
R/W
D1
R/W
D0
R/W
R/W
TYPE
SMOD1
Reserved
EPFI
PFI
Reserved
BIT NAME
Table B.19 EICON Register Bit Descriptions
FUNCTION
BIT
EICON.7
SMOD1 Serial Port 1 baud rate doubler enable. When SMOD1 = 1, the baud rate
for Serial Port 1 is doubled.
EICON.6
EICON.5
Reserved. Read as ‘1’.
EPFI Enable power-fail interrupt. EPFI = 0 disables power-fail interrupt (pfi). EPFI
= 1 enables interrupts generated by the pfi pin.
EICON.4
PFI Power-fail interrupt flag. PFI = 1 indicates a power-fail interrupt was detected
at the pfi pin. PFI must be cleared by software before exiting the interrupt service
routine. Otherwise, the interrupt occurs again. Setting PFI in software generates
a power-fail interrupt, if enabled.
EICON.3-0
Reserved. Read as ‘0’.
B.3.14 EIE
The EIE register contains the external interrupt enables for the extended interrupt unit.
SMSC LPC47N350
325
Revision 1.1 (01-14-03)
DATASHEET
SMSC [ SMSC CORPORATION ]
