Legacy-Free Keyboard/Embedded Controller with SPI and LPC Docking Interface
Table B.5 CKCON Register - SFR 8EH
8EH
SFR ADDRESS
POWER
VCC1
0x01
DEFAULT
BIT
D7
D6
D5
D4
R/W
D3
R/W
D2
R/W
D1
R/W
D0
R/W
R
R
R
TYPE
Reserved
T2M
T1M
T0M
MD2
MD1
MD0
BIT NAME
Table B.6 CKCON Register Bit Descriptions
BIT
FUNCTION
CKCON.7-6
CKCON.5
Reserved
T2M. Timer 2 clock select. When T2M = 0, Timer 2 uses clk/12 (for compatibility
with 80C32); when T2M = 1, Timer 2 uses clk/4. This bit has no effect when Timer
2 is configured for baud rate generation.
CKCON.4
CKCON.3
CKCON.2-0
T1M. Timer 1 clock select. When T1M = 0, Timer 1 uses clk/12 (for compatibility
with 80C32); when T1M = 1, Timer 1 uses clk/4.
T0M. Timer 0 clock select. When T0M = 0, Timer 0 uses clk/12 (for compatibility
with 80C32); when T0M = 1, Timer 0 uses clk/4.
MD2, MD1, MD0 -- Control the number of cycles to be used for external MOVX
instructions.
B.3.5
SPC_FNC
Table B.7 SPC_FNC Register - SFR 8FH
8FH
SFR ADDRESS
POWER
VCC1
0x00
DEFAULT
BIT
D7
D6
D5
D4
D3
D2
D1
D0
R/W
R
R
R
R
R
R
R
TYPE
Reserved
WRS
BIT NAME
Revision 1.1 (01-14-03)
320
SMSC LPC47N350
DATASHEET
SMSC [ SMSC CORPORATION ]
