ST2202A
12.2 Base Timer
Theꢀbaseꢀtimerꢀsupportsꢀoneꢀinterrupt,ꢀwhichꢀoccursꢀatꢀfiveꢀ
differentꢀrates.ꢀApplicationsꢀbaseꢀonꢀtheꢀbaseꢀtimerꢀinterruptꢀ
canꢀchoseꢀanꢀappropriateꢀinterruptꢀrateꢀfromꢀfiveꢀtimeꢀbasesꢀforꢀ
theirꢀspecificꢀneeds.ꢀTheseꢀrealꢁtimeꢀapplicationsꢀmayꢀincludeꢀ
ꢀ
digitizerꢀsampling,ꢀkeyboardꢀdebouncing,ꢀorꢀcommunicationꢀ
polling.ꢀBlockꢀdiagramꢀofꢀbaseꢀtimerꢀisꢀshownꢀinꢀFIGUREꢀ12ꢁ2.ꢀ
BaseꢀTimer
Interrupt
Control
Register
CLK32
2048ꢀHz
Counter
256ꢀHz
Counter
64ꢀHz
Counter
8ꢀHz
Counter
2ꢀHz
Counter
ꢀ
FIGURE 12-2 Base Timer Block Diagram
ꢀ
12.2.1 Base Timer Operations
(
BTSR)ꢀwillꢀshowꢀwhichꢀratesꢀofꢀinterruptsꢀshouldꢀbeꢀserviced.ꢀ
Theꢀbaseꢀtimerꢀconsistsꢀofꢀfiveꢀsubꢁcountersꢀtoꢀproduceꢀfiveꢀ
predefinedꢀrates.ꢀTheꢀconnectionsꢀbetweenꢀoverflowꢀsignalsꢀofꢀ
theseꢀsubꢁcountersꢀandꢀtheꢀbaseꢀtimerꢀinterruptꢀareꢀcontrolledꢀ
byꢀrespectiveꢀbitꢀfieldsꢀofꢀbaseꢀtimerꢀenableꢀregisterꢀ(BTEN).ꢀ
TheꢀenabledꢀoverflowꢀsignalsꢀareꢀORedꢀtoꢀgenerateꢀtheꢀbaseꢀ
timerꢀinterruptꢀrequest.ꢀRelatedꢀbitsꢀofꢀbaseꢀtimerꢀstatusꢀregisterꢀ
ꢀ
Writeꢀ“1”ꢀtoꢀBTCLRꢀ(bitꢀ7ꢀofꢀBTSR)ꢀmayꢀclearꢀthisꢀregister.ꢀ
ꢀ
Note:ꢀMakeꢀsureꢀBTSRꢀisꢀclearedꢀafterꢀtheꢀinterruptꢀ
wasꢀserviced,ꢀsoꢀthatꢀtheꢀrequestꢀcanꢀbeꢀsetꢀnextꢀ
time.
ꢀ
12.2.2 Base Timer Control/Status Registers
Summaryꢀofꢀbaseꢀtimerꢀcontrol/statusꢀregistersꢀisꢀshownꢀinꢀTABLEꢀ12ꢁ3.ꢀ
ꢀ
TABLE 12-3 Summary Of Base Timer Control Registers
Address Name
$020 BTEN
R/W
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
R/Wꢀ
Rꢀ
Wꢀ
R/Wꢀ
R/Wꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
BTEN[4]ꢀ BTEN[3]ꢀ BTEN[2]ꢀ BTEN[1]ꢀ BTEN[0]ꢀ ꢁꢀꢁꢀꢁ0ꢀ0000ꢀ
BTSR[4]ꢀ BTSR[3]ꢀ BTSR[2]ꢀ BTSR[1]ꢀ BTSR[0]ꢀ ꢁꢀꢁꢀꢁ0ꢀ0000ꢀ
$021 BTSR
BTCLRꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
IRXꢀ
IEXꢀ
0ꢁꢀꢁꢀꢁꢀꢁꢀꢁꢀꢁꢀꢁꢀ
ꢁꢀ000ꢀ0000ꢀ
ꢁꢀ000ꢀ0000ꢀ
$03C IREQ
$03E IENA
ꢁꢀ
ꢁꢀ
IRLCDꢀ
IELCDꢀ
IRBTꢀ
IEBTꢀ
IRPTꢀ
IEPTꢀ
IRT1ꢀ
IET1ꢀ
IRT0ꢀ
IET0ꢀ
IRDACꢀ
IEDACꢀ
ꢀ
ꢀ
ꢀ
Base Timer Control Register
ꢀ
TABLE 12-4 Base Timer Control Register (BTEN)
Address Name
R/W
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
$020 BTEN
R/Wꢀ
ꢁꢀ
ꢁꢀ
ꢁꢀ
BTEN[4]ꢀ BTEN[3]ꢀ BTEN[2]ꢀ BTEN[1]ꢀ BTEN[0]ꢀ ꢁꢀꢁꢀꢁ0ꢀ0000ꢀ
ꢀ
ꢀ
Bitꢀ0:ꢀ ꢀ BTEN0 :ꢀ2ꢀHzꢀinterruptꢀcontrolꢀbitꢀ
Bitꢀ3:ꢀ ꢀ BTEN3 :ꢀ256ꢀHzꢀinterruptꢀcontrolꢀbitꢀ
0
ꢀ=ꢀDisableꢀ2ꢀHzꢀinterrupt
0ꢀ=ꢀDisableꢀ256ꢀHzꢀinterrupt
1ꢀ=ꢀEnableꢀ2ꢀHzꢀinterruptꢀ
1ꢀ=ꢀEnableꢀ256ꢀHzꢀinterruptꢀ
ꢀ
ꢀ
Bitꢀ1:ꢀ ꢀ BTEN1 :ꢀ8ꢀHzꢀinterruptꢀcontrolꢀbitꢀ
Bitꢀ4:ꢀ ꢀ BTEN4 :ꢀ2048ꢀHzꢀinterruptꢀcontrolꢀbitꢀ
0
ꢀ=ꢀDisableꢀ8ꢀHzꢀinterrupt
0
ꢀ=ꢀDisableꢀ2048ꢀHzꢀinterrupt
1ꢀ=ꢀEnableꢀ8ꢀHzꢀinterruptꢀ
1ꢀ=ꢀEnableꢀ2048ꢀHzꢀinterruptꢀ
ꢀ
Bitꢀ2:ꢀ ꢀ BTEN2 :ꢀ64ꢀHzꢀinterruptꢀcontrolꢀbitꢀ
0
ꢀ=ꢀDisableꢀ64ꢀHzꢀinterrupt
1ꢀ=ꢀEnableꢀ64ꢀHzꢀinterruptꢀ
ꢀ
ꢀ
Verꢀ2.5ꢀ
27
/
75
ꢀ
9/16/2008ꢀ
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
