ST2202A
12.3 Timer 0
12.3.1 Function Description
TheꢀTimer0ꢀisꢀanꢀ8ꢁbitꢀupꢀcounter.ꢀItꢀcanꢀbeꢀusedꢀasꢀaꢀtimerꢀorꢀ
anꢀeventꢀcounter.ꢀT0C($25)ꢀisꢀaꢀrealꢀtimeꢀread/writeꢀcounter.ꢀ
Whenꢀanꢀoverflowꢀfromꢀ$FFꢀtoꢀ$00,ꢀaꢀtimerꢀinterruptꢀrequestꢀ
IRT0ꢀwillꢀ ꢀ
beꢀgenerated.ꢀTimer0ꢀwillꢀstopꢀcountingꢀwhenꢀsystemꢀclockꢀ
stops.ꢀPleaseꢀreferꢀtoꢀFIGUREꢀ12ꢁ3.ꢀ
ꢀ
ꢀ
MUXꢀ8ꢁ1
TCLK/65536
IN0
TCLK/32768
IN1
TCLK/8192
IN2
TCLK/2048
8ꢀBitꢀꢁꢀUPꢀCounter
PRES
IN3
IN4
IN5
IN6
IN7
OUT
OUT
IRT0
TCLK/256
TCLK/32
TCLK/8
Auto
ꢀReload
T0M[4]
T0M[5]
Enable
D Flip-Flop
TCLK/2
CLOCK
D
Q
SEL
SYSCK
CK
T0M[2~0]
ꢀ
FIGURE 12-3 Timer0 Structure
ꢀ
ꢀ
12.3.2 Timer0 Clock Source Control
SeveralꢀclockꢀsourcesꢀcanꢀbeꢀchosenꢀfromꢀforꢀTimer0.ꢀIt’sꢀveryꢀ
importantꢀthatꢀTimer0ꢀcanꢀkeepꢀcountingꢀasꢀlongꢀasꢀ ꢀ SYSCKꢀ
ꢀ staysꢀactive.ꢀReferꢀtoꢀTABLEꢀ12ꢁ6.ꢀ
ꢀ
ꢀ
TABLE 12-6 Clock Sources Of Timer0
T0M [2]
T0M [1]
T0M [0]
T0ꢀTiꢀm erꢀClockꢀSource
TCLK/65536
TCLK/32768
TCLK/8192
TCLK/2048
TCLK/256
TCLK/32
TCLK/8
TCLK/2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
ꢀ
ꢀ
T0M[4]ꢀ:ꢀControlꢀautomaticꢀreloadꢀoperationꢀ
0ꢀ:ꢀNoꢀautoꢀreloadꢀ
1ꢀ:ꢀAutoꢀreloadꢀ
T0M[5]ꢀ:ꢀControlꢀTimerꢀ0ꢀenable/disableꢀ
0ꢀ:ꢀDisableꢀcountingꢀ
1ꢀ:ꢀEnableꢀcountingꢀ ꢀ
SENAꢀ ꢀ :ꢀPrescalerꢀenableꢀbitꢀ
0ꢀ:ꢀTCLKꢀstopꢀ
1ꢀ:ꢀTCLKꢀcountingꢀ ꢀ
ꢀ
ꢀ
TABLE 12-7 Timer0 Register (T0C)
Address Name R/W
$025 T0C
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Default
R/Wꢀ
T0C[7]ꢀ T0C[6]ꢀ T0C[5]ꢀ T0C[4]ꢀ T0C[3]ꢀ T0C[2]ꢀ T0C[1]ꢀ T0C[0]ꢀ 0000ꢀ0000ꢀ
ꢀ
Bitꢀ7ꢁ0:ꢀ ꢀ ꢀ ꢀ ꢀ T0C[7-0] :ꢀTimer0ꢀupꢀcounterꢀregisterꢀ
ꢀ
Verꢀ2.5ꢀ
29
/
75
ꢀ
9/16/2008ꢀ
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
