ST2202A
TABLE 11-6 BGR Configuration Registers (BRS/BDIV)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1
BRS[7]ꢀ BRS[6]ꢀ BRS[5]ꢀ BRS[4]ꢀ BRS[3]ꢀ BRS[2]ꢀ BRS[1]ꢀ BRS[0]ꢀ ????ꢀ????ꢀ
Address Name
R/W
Bit 0
Default
$066 BRS
$067 BDIV
R/Wꢀ
R/Wꢀ
BDIV[7]ꢀ
BDIV[6]ꢀ
BDIV[5]ꢀ
B
DIV[4]ꢀ
B
DIV[3]ꢀ
B
DIV[2]ꢀ
B
DIV[1]ꢀ BDIV[0]ꢀ ????ꢀ????ꢀ
ꢀ
BGRꢀoutputꢀfrequencyꢀsettings.ꢀSeeꢀEquation9ꢁ1ꢀ~ꢀ9ꢁ3ꢀ
ꢀ
TABLE 11-7 SPI Clock Control Register
Address Name R/W
$053 SCKR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
R/Wꢀ
ꢁꢀ
SCK[2]ꢀ SCK[1]ꢀ SCK[0]ꢀ
BC[3]ꢀ
BC[2]ꢀ
BC[1]ꢀ
BC[0]ꢀ ꢁ000ꢀ0000ꢀ
ꢀ
Bitꢀ6~4:ꢀSCK[2:0]ꢀ:ꢀSPIꢀclockꢀselectionꢀ
SCK[2:0]
000
SPICKꢀ
SYSCK/2ꢀ
001ꢀ
010ꢀ
011ꢀ
100ꢀ
101ꢀ
110ꢀ
SYSCK/4ꢀ
SYSCK/8ꢀ
SYSCK/16ꢀ
SYSCK/32ꢀ
SYSCK/64ꢀ
SYSCK/128ꢀ
SYSCK/256ꢀ
111ꢀ
ꢀ
ꢀ
Verꢀ2.5ꢀ
24
/75
ꢀ
9/16/2008ꢀ
SITRONIX [ SITRONIX TECHNOLOGY CO., LTD. ]
