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SII0680ACLU144 参数 Datasheet PDF下载

SII0680ACLU144图片预览
型号: SII0680ACLU144
PDF下载: 下载PDF文件 查看货源
内容描述: PCI转IDE / ATA [PCI to IDE/ATA]
分类和应用: PC
文件页数/大小: 124 页 / 782 K
品牌: SILICONIMAGE [ Silicon image ]
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SiI0680A PCI to IDE/ATA  
Data Sheet  
Silicon Image, Inc.  
Bit [11:09]: Device 0 HSTROBE Delay (R/W) – IDE1 Device 0 HSTROBE Delay for UDMA Mode. This bit field  
is used for programming the HSTROBE output delay in increments of 2 nsec in UDMA mode  
Bit [08:07]: Reserved (R). This bit field is reserved and returns zeros on a read.  
Bit [22]: Reserved (R/W) – This bit field is reserved.  
Bit [05:00]: Device 0 Cycle Time Count (R/W) – IDE1 Device 0 UDMA Cycle Time Count. This bit field is used  
for programming the UDMA Active and Recovery Time.  
9.7.51 Test Register – IDE1  
Address Offset: F0H  
Access Type: Read/Write  
Reset Value: 0x0000_0000  
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00  
Module Select  
Nibble Select  
Sub-Module Select  
Data Field  
This register defines the test register for IDE Channel #1 in the SiI 0680A. This register is for chip-level simulation and  
verification purposes only. The register bits are defined below.  
Bit [31:28]: Module Select (R/W) – IDE1 Test Module Select. This bit field is used to select the logic module for  
testing: 0001B = DIF module; 0010B = TMR module; 0011B = PIF module; and, 0100B = DUW module.  
Bit [27:24]: Nibble Select (R/W) – IDE1 Test Control Nibble Select. This bit field is used to select the control  
nibble for testing. A value of 0001B selects the least significant nibble, while a value of 1000B selects the most  
significant nibble.  
Bit [23:16]: Sub-Module Select (R/W) – IDE1 Test Sub-Module Select. This bit field is used to select the logic  
sub-module for testing. The valid selections are listed below.  
Module Select  
0001B  
Sub-Module Select  
0001B  
Description  
FIFO Data  
Timer 1  
Timer 2  
Timer 3  
Timer 4  
0010B  
0001B  
0010B  
0010B  
0010B  
0011B  
0010B  
0100B  
0011B  
0001B  
PBM_BYTE_CNT  
WD_TMO  
0011B  
0010B  
0100B  
0001B  
DUW_TMR_CNT  
Table 9-11: IDE1 Test Register Selections  
Bit [15:00]: Data Field (R/W) – IDE1 Test Data Field. This bit field is used to write a preload value to the  
selected counter or read the current value of the selected counter.  
© 2006 Silicon Image, Inc.  
SiI-DS-0069-C  
101  
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