SiI0680A PCI to IDE/ATA
Data Sheet
Silicon Image, Inc.
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Bit [01]: Buffered Cmd (R) – IDE1 Buffered Command Active. This bit set indicates that a Buffered Command is
currently active. This bit is set when the first command byte is written to the comand buffer. This bit is cleared
when all of the task file bytes, including the command byte, have been written to the device.
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Bit [00]: Cable 80 (R) – IDE1 Cable 80 Detection. This bit provides real-time status of the inverted version of
the IDE1_CBLID_N pin. When set, it indicates that 80 pin cable is detected.
9.7.48 IDE1 PIO Timing
Address Offset: E4H
Access Type: Read/Write
Reset Value: 0x62DD_62DD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Device 1 Addr
Setup Count
Device 1 Active Count
Device 1 Recovery
Count
Device 0 Addr
Setup Count
Device 0 Active Count
Device 0 Recovery
Count
This register defines the PIO timing register for IDE Channel #1 in the SiI 0680A. See chapter 11 for details on
programming this timing register. The register bits are defined below.
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Bit [31:28]: Device 1 Addr Setup Count (R/W) – IDE1 Device 1 Address Setup Time Count for PIO Mode. This
bit field is used for programming the address setup time relative to IDE1_DIOR_N and IDE1_DIOW_N in PIO
mode.
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Bit [27:22]: Device 1 Active Count (R/W) – IDE1 Device 1 DIOR_N and DIOW_N Active Time Count for PIO
Mode. This bit field is used for programming the active time of IDE1_DIOR_N and IDE1_DIOW_N in PIO mode.
Bit [21:16]: Device 1 Recovery Count (R/W) – IDE1 Device 1 DIOR_N and DIOW_N Recovery Time Count for
PIO Mode. This bit field is used for programming the recovery time of IDE1_DIOR_N and IDE1_DIOW_N in PIO
mode.
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Bit [15:12]: Device 0 Addr Setup Count (R/W) – IDE1 Device 0 Address Setup Time Count for PIO Mode. This
bit field is used for programming the address setup time relative to IDE1_DIOR_N and IDE1_DIOW_N in PIO
mode.
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Bit [11:06]: Device 0 Active Count (R/W) – IDE1 Device 0 DIOR_N and DIOW_N Active Time Count for PIO
Mode. This bit field is used for programming the active time of IDE1_DIOR_N and IDE1_DIOW_N in PIO mode.
Bit [05:00]: Device 0 Recovery Count (R/W) – IDE1 Device 0 DIOR_N and DIOW_N Recovery Time Count for
PIO Mode. This bit field is used for programming the recovery time of IDE1_DIOR_N and IDE1_DIOW_N in PIO
mode.
© 2006 Silicon Image, Inc.
SiI-DS-0069-C
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