Si3220/Si3225
Table 5. AC Characteristics (Continued)
(VDD, VDD1–VDD4 = 3.13 to 5.25 V, TA = 0 to 70 °C for K/F-Grade, –40 to 85 °C for B/G-Grade)
Parameter
Test Condition
300 Hz to 3.4 kHz
Min
34
Typ
40
Max
—
Unit
dB
5
Transhybrid Balance
Noise Performance
C-Message weighted
6
—
12
15
dBrnC
Idle Channel Noise
Psophometric weighted
3 kHz flat
RX and TX, dc to 3.4 kHz
RX and TX, dc to 3.4 kHz
Longitudinal Performance
200 Hz to 1 kHz
—
—
40
60
–78
—
–75
18
—
dBmP
dBrn
dB
PSRR from V
PSRR from V
–V
—
DD1
BAT
DD4
—
—
dB
Longitudinal to Metallic/PCM
Balance (forward or reverse)
58
53
40
63
58
—
—
—
—
dB
dB
dB
1 kHz to 3.4 kHz
200 Hz to 3.4 kHz
Metallic/PCM to Longitudinal
Balance
7
Longitudinal Impedance
200 Hz to 3.4 kHz at TIP or RING
Register-dependent
OBIAS/ABIAS
00 = 4 mA
—
—
—
—
50
25
25
20
—
—
—
—
Ω
Ω
Ω
Ω
01 = 8 mA
10 = 12 mA
11 = 16 mA
7
Longitudinal Current per Pin
Active off-hook
200 Hz to 3.4 kHz
Register-dependent
OBIAS/ABIAS
00 = 4 mA
—
—
—
—
4
8
—
—
—
—
mA
mA
mA
mA
01 = 8 mA
10 = 12 mA
8
11 = 16 mA
10
Notes:
1. The input signal level should be 0 dBm0 for frequencies greater than 100 Hz. For 100 Hz and below, the level should
be –10 dBm0. The output signal magnitude at any other frequency will be smaller than the maximum value specified.
2. Analog signal measured as VTIP – VRING. Assumes ideal line impedance matching.
3. The quantization errors inherent in the µ/A-law companding process can generate slightly worse gain tracking
performance in the signal range of 3 to –37 dB for signal frequencies that are integer divisors of the 8 kHz PCM
sampling rate.
4. The digital gain block is a linear multiplier that is programmable from –∞ to +6 dB. The step size in dB varies over the
complete range. See “Audio Path Processing”.
5. VDD1–VDD4 = 3.3 V, VBAT = –52 V, no fuse resistors, RL = 600 Ω, ZS = 600 Ω synthesized using RS register
coefficients.
6. The level of any unwanted tones within the bandwidth of 0 to 4 kHz does not exceed –55 dBm.
7. The OBIAS and ABIAS registers program the dc bias current through the SLIC in the on-hook transmission and off-
hook active conditions, respectively. This per-pin total current setting should be selected so it can accommodate the
sum of the metallic and longitudinal currents through each of the TIP and RING leads for a given application.
Rev. 1.0
11
SILICONIMAGE [ Silicon image ]
