HDLC CONTROLLERS
S3C4510B
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3 2 1 0
D D D D D D D D R D
R R R R R R R R
R
x
F
D
I
R
x
F
A
I
T
x
F
T T
T
x
F
P P T T T R R R x
L L
T
x
x
x
x
x
x
x
I
x x
x
x
x
x
x
x
x
x
I
M O N C A
F S
U S
L L N N F N N F E A
T O O L D O L D R B
O V O R B D V D
A C
I
C
V
I
I
I
C T L
I
C
I
E T
I
M M
I
I
I
I
I
I
R T
E E E
I
E E D
E
E
E E
S
I
E
I
I
E E E E E E
I
I
E
I
E
I
I
E E
E E
E
E
E
[3:0] Reserved
[18] Non-dctet aligned frame interrupt enable
(RxNOIE)
[4] Tx frame complete interrupt enable
(TxFCIE)
[19] Rx overrun interrupt enable (RxOVIE)
[5] Tx FIFO available to write interrupt
enable (TxFAIE)
[20] Rx memory overflow interrupt enable
(RxMOVIE)
[6] Reserved
[21] Reserved
[7] CTS transition has occurred interrupt
enable (TxSCTIE)
[22] DMA Tx abort interrupt enable
(DTxABTIE)
[8] Transmit underrun has occured
interrupt enable (TxUIE)
[23] Rx internal error interrupt enable
(RxIERRIEN)
[9] RxFIFO available to read interrupt
enable (RxFAIE)
[24] DMA Rx frame done every received frame
interrupt enable (DRxFDIE)
[10] Reserved
[25] DMA Rx null list interrupt enable
(DRxNLIE)
[11] Flag detected interrupt enable
(RxFDIE)
[26] DMA Rx not owner interrupt enable
(DRxNOIE)
[12] Reserved
[27] DMA Tx frame done every received frame
interrupt enable (DTxFDIE)
[13] DCD transition interrupt enable
(RxSDCDIE)
[28] DMA Tx null list interrupt enable
(DTxNLIE)
[14] Valid frame interruopt enable (RxFVIE)
[15] Idle detected interruot enable
(RxIDLEIE)
[29] DMA Tx not owner interrupt enable
(DTxNOIE)
[16] Abort detected interrupt enable
(RxABTIE)
[30] DPLL one missing interrupt enable
(DPLLOMIE)
[17] CRC error frame interrupt enable
(RxCRCEIE)
[31] DPLL two missing interrupt enable
(DPLLTMIE)
Figure 8-18. HDLC Interrupt Enable Register
8-42