K6F4008U2E Family
CMOS SRAM
RECOMMENDED DC OPERATING CONDITIONS1)
Item
Symbol
Vcc
Min
2.7
0
Typ
Max
3.3
Unit
V
Supply voltage
Ground
3.0
Vss
0
-
0
V
Vcc+0.32)
0.6
Input high voltage
Input low voltage
VIH
2.2
-0.33)
V
VIL
-
V
Note:
1. TA=-40 to 85°C, otherwise specified.
2. Overshoot: Vcc+2.0V in case of pulse width £20ns.
3. Undershoot: -2.0V in case of pulse width £20ns.
4. Overshoot and undershoot are sampled, not 100% tested.
CAPACITANCE1) (f=1MHz, TA=25°C)
Item
Input capacitance
Symbol
CIN
Test Condition
Min
Max
8
Unit
pF
VIN=0V
VIO=0V
-
-
Input/Output capacitance
CIO
10
pF
1. Capacitance is sampled, not 100% tested.
DC AND OPERATING CHARACTERISTICS
Typ1)
Symbol
ILI
Item
Test Conditions
Min
Max Unit
Input leakage current
Output leakage current
VIN=Vss to Vcc
-1
-1
-
-
1
1
mA
mA
ILO
CS1=VIH, CS2=VIL or OE=VIH or WE=VIL, VIO=Vss to Vcc
Cycle time=1ms, 100%duty, IIO=0mA, CS1£0.2V,
CS2³ Vcc-0.2V, VIN£0.2V or VIN³ VCC-0.2V
ICC1
-
-
2
mA
Average operating current
Cycle time=Min, IIO=0mA, 100% duty,
CS1=VIL, CS2=VIH, VIN=VIL or VIH
70ns
55ns
-
-
-
-
-
-
15
20
0.4
-
ICC2
mA
Output low voltage
Output high voltage
VOL
VOH
IOL = 2.1mA
IOH = -1.0mA
-
V
V
2.4
CS1³ Vcc-0.2V, CS2³ Vcc-0.2V(CS1 controlled) or
0V£CS2£0.2V(CS2 controlled), Other inputs=0~Vcc
Standby Current (CMOS)
ISB1
-
1
12
mA
1. Typical value are measured at VCC=3.0V, TA=25°C, and not 100% tested.
Revision 1.0
March 2001
- 4 -