CMOS SDRAM
SDRAM 256Mb E-die (x4, x8, x16)
DC CHARACTERISTICS (x16)
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Version
Parameter
Symbol
Test Condition
Unit Note
60
75
Burst length = 1
tRC ≥ tRC(min)
IO = 0 mA
Operating current
(One bank active)
ICC1
140
90
mA
1
ICC2P
2
2
CKE ≤ VIL(max), tCC = 10ns
Precharge standby current in
power-down mode
mA
mA
ICC2PS
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2N
20
10
Precharge standby current in
non power-down mode
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC2NS
ICC3P
6
6
CKE ≤ VIL(max), tCC = 10ns
Active standby current in
power-down mode
mA
ICC3PS
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3N
25
25
mA
mA
Active standby current in
non power-down mode
(One bank active)
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
ICC3NS
IO = 0 mA
Operating current
(Burst mode)
Page burst
4banks Activated.
tCCD = 2CLKs
ICC4
170
200
130
180
mA
1
Refresh current
ICC5
ICC6
tRC ≥ tRC(min)
mA
mA
mA
2
3
4
C
3
Self refresh current
CKE ≤ 0.2V
L
1.5
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S561632E-UC
4. K4S561632E-UL
5. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).
Rev. 1.3 August 2004
SAMSUNG [ SAMSUNG ]
