CMOS SDRAM
SDRAM 256Mb E-die (x4, x8, x16)
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
60
75
Parameter
Symbol
tCC
Unit
ns
Note
1
Min
Max
Min
7.5
10
Max
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
CAS latency=3
CAS latency=2
6
-
CLK cycle time
1000
1000
5
-
5.4
6
CLK to valid
output delay
tSAC
ns
1,2
2
2.5
-
3
Output data
hold time
tOH
ns
3
CLK high pulse width
CLK low pulse width
Input setup time
tCH
tCL
2.5
2.5
1.5
1
2.5
2.5
1.5
0.8
1
ns
ns
ns
ns
ns
3
3
3
3
2
tSS
tSH
tSLZ
Input hold time
CLK to output in Low-Z
1
CAS latency=3
CAS latency=2
5
-
5.4
6
CLK to output in Hi-Z
tSHZ
ns
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
DQ BUFFER OUTPUT DRIVE CHARACTERISTICS
Parameter
Symbol
Condition
Min
Typ
Max
Unit
Notes
Measure in linear
region : 1.2V ~ 1.8V
Output rise time
trh
1.37
4.37
3.8
5.6
Volts/ns
Volts/ns
Volts/ns
Volts/ns
3
Measure in linear
region : 1.2V ~ 1.8V
Output fall time
Output rise time
Output fall time
tfh
trh
tfh
1.30
2.8
3
Measure in linear
region : 1.2V ~ 1.8V
3.9
2.9
1,2
1,2
Measure in linear
region : 1.2V ~ 1.8V
2.0
5.0
Notes :
1. Rise time specification based on 0pF + 50 Ω to VSS, use these values to design to.
2. Fall time specification based on 0pF + 50 Ω to VDD, use these values to design to.
3. Measured into 50pF only, use these values to characterize to.
4. All measurements done with respect to VSS.
Rev. 1.3 August 2004