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K4M56323LE-EN1L 参数 Datasheet PDF下载

K4M56323LE-EN1L图片预览
型号: K4M56323LE-EN1L
PDF下载: 下载PDF文件 查看货源
内容描述: 2米x 32位×4银行移动SDRAM的90FBGA [2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 12 页 / 143 K
品牌: SAMSUNG [ SAMSUNG ]
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K4M56323LE - M(E)E/N/S/C/L/R  
Mobile-SDRAM  
OPERATING AC PARAMETER  
(AC operating conditions unless otherwise noted)  
Version  
Parameter  
Symbol  
Unit  
Note  
-80  
16  
19  
19  
48  
-1H  
-1L  
19  
24  
24  
60  
Row active to row active delay  
RAS to CAS delay  
tRRD(min)  
tRCD(min)  
19  
ns  
ns  
1
1
1
1
19  
Row precharge time  
tRP(min)  
19  
ns  
tRAS(min)  
50  
ns  
Row active time  
tRAS(max)  
100  
us  
Row cycle time  
tRC(min)  
67  
69  
84  
ns  
1
2
3
2
2
4
Last data in to row precharge  
Last data in to Active delay  
Last data in to new col. address delay  
Last data in to burst stop  
tRDL(min)  
2
CLK  
-
tDAL(min)  
tRDL + tRP  
tCDL(min)  
1
1
1
2
1
0
CLK  
CLK  
CLK  
tBDL(min)  
Col. address to col. address delay  
Number of valid output data  
Number of valid output data  
Number of valid output data  
tCCD(min)  
CAS latency=3  
CAS latency=2  
CAS latency=1  
ea  
5
NOTES:  
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next  
higher integer.  
2. Minimum delay is required to complete write.  
3. Minimum tRDL=2CLK and tDAL(= tRDL + tRP) is required to complete both of last data write command(tRDL) and precharge command(tRP).  
4. All parts allow every cycle column address change.  
5. In case of row precharge interrupt, auto precharge and read burst stop.  
February 2004  
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