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K4M56323LE-EN1L 参数 Datasheet PDF下载

K4M56323LE-EN1L图片预览
型号: K4M56323LE-EN1L
PDF下载: 下载PDF文件 查看货源
内容描述: 2米x 32位×4银行移动SDRAM的90FBGA [2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 12 页 / 143 K
品牌: SAMSUNG [ SAMSUNG ]
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K4M56323LE - M(E)E/N/S/C/L/R  
Mobile-SDRAM  
SIMPLIFIED TRUTH TABLE  
A11,  
Note  
COMMAND  
CKEn-1 CKEn CS RAS CAS WE DQM BA0,1 A10/AP  
A9 ~ A0  
Register  
Refresh  
Mode Register Set  
Auto Refresh  
H
H
X
H
L
L
L
L
L
L
L
L
X
X
OP CODE  
X
1, 2  
3
H
Entry  
3
Self  
L
H
L
H
X
L
H
X
H
H
X
H
3
Refresh  
Exit  
L
H
H
H
X
X
X
X
X
X
3
Bank Active & Row Addr.  
V
V
Row Address  
Read &  
Column Address  
Auto Precharge Disable  
Auto Precharge Enable  
L
Column  
4
L
H
L
H
Address  
(A0~A8)  
H
4, 5  
Write &  
Column Address  
Auto Precharge Disable  
Auto Precharge Enable  
L
Column  
Address  
(A0~A8)  
4
H
H
H
X
X
X
L
L
L
H
H
L
L
H
H
L
L
L
X
X
X
V
H
4, 5  
Burst Stop  
Precharge  
X
6
Bank Selection  
All Banks  
V
X
L
X
H
H
L
X
V
X
X
H
X
V
X
X
H
X
V
X
X
H
X
V
X
V
X
X
H
X
V
Entry  
H
L
L
H
L
X
X
X
Clock Suspend or  
Active Power Down  
X
X
Exit  
X
H
L
Entry  
H
Precharge Power Down  
Mode  
H
L
Exit  
L
H
H
H
X
X
V
X
DQM  
X
X
7
H
L
X
H
X
H
No Operation Command  
(V=Valid, X=Dont Care, H=Logic High, L=Logic Low)  
NOTES :  
1. OP Code : Operand Code  
A0 ~ A11 & BA0 ~ BA1 : Program keys. (@MRS)  
2. MRS can be issued only at all banks precharge state.  
A new command can be issued after 2 CLK cycles of MRS.  
3. Auto refresh functions are the same as CBR refresh of DRAM.  
The automatical precharge without row precharge command is meant by "Auto".  
Auto/self refresh can be issued only at all banks precharge state.  
Partial self refresh can be issued only after setting partial self refresh mode of EMRS.  
4. BA0 ~ BA1 : Bank select addresses.  
5. During burst read or write with auto precharge, new read/write command can not be issued.  
Another bank read/write command can be issued after the end of burst.  
New row active of the associated bank can be issued at tRP after the end of burst.  
6. Burst stop command is valid at every burst length.  
7. DQM sampled at the positive going edge of CLK masks the data-in at that same CLK in write operation (Write DQM latency is 0), but in read operation,  
it makes the data-out Hi-Z state after 2 CLK cycles. (Read DQM latency is 2).  
February 2004  
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