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K4D64163HF-TC33 参数 Datasheet PDF下载

K4D64163HF-TC33图片预览
型号: K4D64163HF-TC33
PDF下载: 下载PDF文件 查看货源
内容描述: 1米x 16Bit的×4银行双数据速率同步DRAM [1M x 16Bit x 4 Banks Double Data Rate Synchronous DRAM]
分类和应用: 内存集成电路光电二极管动态存储器双倍数据速率时钟
文件页数/大小: 16 页 / 164 K
品牌: SAMSUNG [ SAMSUNG ]
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64M DDR SDRAM  
K4D64163HF  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Voltage on any pin relative to Vss  
Voltage on VDD supply relative to Vss  
Voltage on VDD supply relative to Vss  
Storage temperature  
Symbol  
VIN, VOUT  
VDD  
Value  
-0.5 ~ 3.6  
-1.0 ~ 3.6  
-0.5 ~ 3.6  
-55 ~ +150  
1.0  
Unit  
V
V
VDDQ  
TSTG  
V
°C  
W
Power dissipation  
PD  
Short circuit current  
IOS  
50  
mA  
Note :  
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.  
Functional operation should be restricted to recommended operating condition.  
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.  
POWER & DC OPERATING CONDITIONS(SSTL_2 In/Out)  
Recommended operating conditions(Voltage referenced to VSS=0V, TA=0 to 65°C)  
Parameter  
Device Supply voltage  
Output Supply voltage  
Reference voltage  
Symbol  
VDD  
Min  
3.135  
Typ  
Max  
3.465  
Unit  
V
Note  
3.3  
1
VDDQ  
VREF  
Vtt  
2.375  
2.50  
2.625  
V
1
0.49*VDDQ  
VREF-0.04  
VREF+0.15  
-0.30  
-
0.51*VDDQ  
VREF+0.04  
VDDQ+0.30  
VREF-0.15  
-
V
2
Termination voltage  
VREF  
V
3
Input logic high voltage  
Input logic low voltage  
Output logic high voltage  
Output logic low voltage  
Input leakage current  
Output leakage current  
VIH(DC)  
VIL(DC)  
VOH  
-
-
-
-
-
-
V
4
V
5
Vtt+0.76  
-
V
IOH=-15.2mA  
VOL  
Vtt-0.76  
5
V
IOL=+15.2mA  
IIL  
-5  
uA  
uA  
6
6
IOL  
-5  
5
Note :  
1. Under all conditions VDDQ must be less than or equal to VDD.  
2. VREF is expected to equal 0.50*VDDQ of the transmitting device and to track variations in the DC level of the same. Peak to  
peak noise on the VREF may not exceed + 2% of the DC value. Thus, from 0.50*VDDQ, VREF is allowed + 25mV for DC error  
and an additional + 25mV for AC noise.  
3. Vtt of the transmitting device must track VREF of the receiving device.  
4. VIH(max.)= VDDQ +1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.  
5. VIL(mim.)= -1.5V for a pulse width and it can not be greater than 1/3 of the cycle rate.  
6. For any pin under test input of 0V < VIN < VDD is acceptable. For all other pins that are not under test VIN=0V.  
- 10 -  
Rev. 1.1(Aug. 2002)  
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