RT8876A
Connect a resistive voltage divider from VCC5 to GND,
and the joint of the resistive voltage divider is connected
to the OCSETA pin as shown in Figure 26. For a given
Usually, ROC1a is selected to be equal to the thermistor's
nominal resistance at room temperature. Ideally, assume
VOCSET has the same temperature coefficient as RSENSE
(InductorDCR) :
ROC2
,
V
⎛
⎞
CC5
V
R
SENSE, HOT
OCSETA, HOT
R
= R
×
OC2
−1
⎟
OC1
⎜
⎝
=
(56)
V
OCSET
⎠
V
R
SENSE, COLD
OCSETA, COLD
V
CC5
According to the basic circuit calculation, we can get
VOCSETA at any temperature :
R
OC1
VOCSETA, T°C
=
OCSETA
ROC2
ROC1a // RNTC, 25°C + ROC1b + ROC2
VCC5
×
(57)
R
OC2
Re-write (56) from (57) to get VOCSETA at room temperature:
Figure 26. AXGVR : OCP Setting without Temperature
Compensation
R
//R
+ R
+ R
+ R
+ R
R
SENSE, HOT
OC1a
NTC, COLD
OC1b
OC2
=
R
//R
R
SENSE, COLD
OC1a
NTC, HOT
OC1b
OC2
(58)
VOCSETA, 25°C
VCC5
=
The current limit is triggered when inductor current
exceeds the current limit threshold, ILIMIT_AXG, as defined
by VOCSETA. The driver will then be forced to turn off UGATE
until the condition is cleared. If the over current condition
of any phase remains valid for 15 cycles, theAXGVR will
trigger OCP latch. Latched OCP forces PWM into high
impedance, which disables internal PWM logic drivers. If
the over current condition is not valid for 15 continuous
cycles, the OCP latch counter will be reset. When OCP
is triggered by the AXGVR, the CORE VR will also enter
soft shut down sequence. If inductor DCR is used as the
current sense component, temperature compensation is
recommended for proper protection under all conditions.
Figure 26 shows a typical OCP setting with temperature
compensation.
ROC2
×
(59)
ROC1a // RNTC, 25°C + ROC1b + ROC2
Solving (62) and (63) yields ROC1b and ROC2
ROC2
=
α ×REQU, HOT −REQU, COLD + (1− α)×REQU, 25°C
VCC5
VOCSETA, 25°C
×(1− α)
(60)
(61)
ROC1b
=
(α −1)×ROC2 + α ×REQU, HOT − REQU, COLD
(1− α)
where
α =
RSENSE, HOT
DCR25°C ×[1+ 0.00393×(THOT − 25)]
=
RSENSE, COLD DCR25°C ×[1+ 0.00393×(TCOLD − 25)]
V
CC5
(62)
REQU, T°C = ROC1a // RNTC, T°C
(63)
R
NTC
OC1b
OC2
OC1a
Over Voltage Protection (OVP)
R
R
The over voltage protection circuit of theAXGVR monitors
the output voltage via the ISENAN pin after POR. The
supported maximum operating VID of the VR (V(MAX)) is
stored in the VOUT_Max register. Once VISENAN exceeds
“V(MAX) + 150mV”, OVP is triggered and latched. The
AXGVR will try to turn on low side MOSFETs and turn off
OCSETA
Figure 27. AXGVR : OCP Setting with Temperature
Compensation
Copyright 2012 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
46
DS8876A-02 October 2012
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
