3858 Group
(9) Port P2
4
(10) Port P2
5
Pull-up control bit
Pull-up control bit
Serial I/O1 enable bit
Receive enable bit
P-channel output disable bit
Serial I/O1 enable bit
Transmit enable bit
Direction
register
Direction
register
Data bus
Port latch
Data bus
Port latch
Serial I/O1 input
Pull-up control bit
Serial I/O1 output
(12) Port P2
7
(11) Port P2
6
Pull-up control bit
Pulse output mode
Serial I/O1 mode selection bit
Serial I/O1 enable bit
Serial I/O1 synchronous
clock selection bit
Serial I/O1 enable bit
S
RDY1 output enable bit
Serial I/O1 mode selection bit
Serial I/O1 enable bit
Direction
Direction
register
register
Data bus
Port latch
Port latch
Data bus
Pulse output mode
Serial ready output
Timer output
Serial I/O1 clock output
External clock input
CNTR
0
interrupt
input
(13) Ports P0
4
-P0
7
, P3
0
-P3
4
(14) Port P40
Pull-up control bit
Pull-up control bit
Direction
register
Direction
register
Data bus
Port latch
Data bus
Port latch
Pulse output mode
Timer output
A/D converter input
CNTR
1
interrupt
input
Analog input pin selection bit
Analog input port selection switch bit
(15) Ports P41,P42
(16) Port P4
3
Pull-up control bit
Serial I/O2 I/O
Pull-up control bit
comparison signal control bit
Direction
register
Direction
register
Data bus
Port latch
Data bus
Port latch
Serial I/O2 I/O
comparison signal output
Interrupt input
Interrupt input
Fig. 11 Port block diagram (2)
Rev.1.10 Apr 3, 2006 page 14 of 75
REJ03B0139-0110