M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
The vertical display start position for each block can be set in 512
steps (where each step is 1TH (TH: HSYNC cycle)) as values “0016” to
“FF16” in vertical position register i (i = 1 and 2) (addresses 00D416
and 00D516) and values “0” or “1” in bit 6 of block control register i (i
= 1 and 2) (addresses 00D216 and 00D316). The vertical position
register is shown in Figure 8.10.8.
The vertical display start position of both blocks can be switched in
each step to 1TH or 2TH by setting values “0” or “1” in bit 1 of OSD
control register 2 (address 00DB16).
Vertical Position Register i
b7 b6 b5 b4 b3 b2 b1 b0
Vertical position register i (VPi) (i = 1 and 2) [Addresses 00D416, 00D516
]
After reset
Name
B
Functions
R
R
W
W
Vertical display start
position control bits
(VPi0 to VPi7)
Vertical display start position =
TH ✕ (BCi6 ✕ 162 + n)
(n: setting value, TH: HSYNC cycle,
BCi6: bit 6 of block control register i)
Inderterminate
0
to
7
(See notes)
Notes 1: Set values except “0016” to VPi when BCi6 is “0.”
2: When OS21 of OSD control register 2 = “0”, T
and OS21 of OSD control register 2 = “1”, T
H
= 1HSYNC
,
H
= 2HSYNC
.
Fig. 8.10.8 Vertical Position Register i (i = 1 and 2)
Rev.1.00 2003.11.25 page 57 of 128
RENESAS [ RENESAS TECHNOLOGY CORP ]
