M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
Interrupt Request Register 1
b7 b6 b5 b4 b3 b2 b1 b0
Interrupt request register 1 (IREQ1) [Address 00FC16]
B
0
Name
Functions
Afrer reset R W
0
0 : No interrupt request issued
1 : Interrupt request issued
ꢀ
R
Timer 1 interrupt request
bit (TM1R)
1
2
3
4
5
6
7
ꢀ
Timer 2 interrupt request 0 : No interrupt request issued
bit (TM2R) 1 : Interrupt request issued
0
0
0
R
Timer 3 interrupt request 0 : No interrupt request issued
bit (TM3R) 1 : Interrupt request issued
ꢀ
ꢀ
ꢀ
R
R
R
Timer 4 interrupt request 0 : No interrupt request issued
bit (TM4R)
1 : Interrupt request issued
OSD interrupt
request bit (OSDR)
0 : No interrupt request issued
1 : Interrupt request issued
0
0
0
0
VSYNC interrupt request
bit (VSCR)
0 : No interrupt request issued
1 : Interrupt request issued
ꢀ
ꢀ
R
R
INT3 external interrupt
request bit (IN3R)
0 : No interrupt request issued
1 : Interrupt request issued
R —
Nothing is assigned. This bit is a write disable bit.
When this bit is read out, the value is “0.”
ꢀ: “0” can be set by software, but “1” cannot be set.
Fig. 8.3.2 Interrupt Request Register 1
Interrupt Request Register 2
b7b6 b5b4b3 b2b1b0
0
0
Interrupt request register 2 (IREQ2) [Address 00FD16
]
After reset
0
B
0
Name
Functions
R W
INT1 external interrupt
request bit (IN1R)
0 : No interrupt request issued
1 : Interrupt request issued
ꢀ
ꢀ
ꢀ
R
R
R
R
Fix this bit to “0.”
1
2
3
4
0
0
0
Serial I/O interrupt
request bit (SIR)
0 : No interrupt request issued
1 : Interrupt request issued
ꢀ
f(XIN
)/4096 interrupt
0 : No interrupt request issued
1 : Interrupt request issued
0 : No interrupt request issued
1 : Interrupt request issued
request bit (CKR)
INT2 external interrupt
request bit (IN2R)
Multi-master I2C-BUS
interrupt request bit (IICR) 1 : Interrupt request issued
Timer 5 • 6 interrupt
ꢀ
ꢀ
0
0
R
R
0 : No interrupt request issued
5
6
ꢀ
0 : No interrupt request issued
1 : Interrupt request issued
0
0
R
request bit (TM56R)
7
Fix this bit to “0.”
R W
ꢀ: “0” can be set by software, but “1” cannot be set.
Fig. 8.3.3 Interrupt Request Register 2
Rev.1.00 2003.11.25 page 19 of 128
RENESAS [ RENESAS TECHNOLOGY CORP ]
