MULTIJUNCTION TIMERS
10.6 TML (Input-Related 32-Bit Timer)
10
10.6 TML (Input-Related 32-Bit Timer)
10.6.1 Outline of TML
TML (Timer Measure Large) is an input-related 32-bit timer capable of measuring input pulses in two circuit
blocks comprising a total of eight channels.
The table below shows specifications of TML. The diagram in the next page shows a block diagram of TML.
Table 10.6.1 Specifications of TML (Input-Related 32-Bit Timer)
Item
Specification
Number of channels
Input clock
8 channels (2 circuit blocks consisting of 4 channels each, 8 channels in total)
BCLK/2 (10.0 MHz when f(BCLK) = 20 MHz) or clock bus 1 input
32-bit up-counter × 2
Counter
Measure register
Timer startup
32-bit measure register × 8
Start counting immediately after reset
Output event bus
Clock bus Input event bus
3 2 1 0 3 2 1 0
0 1 2 3
TML0
clk
Measure register 3
Counter
(32-bit)
S
BCLK/2
Measure register 2
Measure register 1
Measure register 0
cap3
cap2
cap1
cap0
IRQ11
S
TIN20 (P134)
TIN20S
TIN21S
TIN22S
TIN23S
IRQ11
S
TIN21 (P135)
TIN22 (P136)
TIN23 (P137)
IRQ11
IRQ11
S
S
TML1
clk
Counter
(32-bit)
Measure register 3
S
Measure register 2
Measure register 1
Measure register 0
cap3
cap2
cap1
cap0
IRQ18
S
TIN30 (P194)
TIN31 (P195)
TIN32 (P196)
TIN33 (P197)
TIN30S
TIN31S
TIN32S
TIN33S
IRQ18
IRQ18
IRQ18
S
S
S
3 2 1 0 3 2 1 0
0 1 2 3
S
: Selector
Figure 10.6.1 Block Diagram of TML (Input-Related 32-Bit Timer)
32180 Group User’s Manual (Rev.1.0)
10-132
RENESAS [ RENESAS TECHNOLOGY CORP ]
