DMAC
9.2 DMAC Related Registers
9
DM04ITST (H'0080 0400)
DM04ITMK (H'0080 0401)
DMA4UDF
DMITST4
Data bus
5-source inputs
b3
F/F
DMA transfer interrupt request 0
DMITMK4
F/F
(Level)
b11
DMA3UDF
b4
DMITST3
F/F
DMITMK3
F/F
b12
DMA2UDF
b5
DMITST2
F/F
DMITMK2
F/F
b13
DMA1UDF
DMITST1
F/F
b6
DMITMK1
F/F
b14
DMA0UDF
b7
DMITST0
F/F
DMITMK0
F/F
b15
Figure 9.2.4 Block Diagram of DMA Transfer Interrupt Request 0
DM59ITST (H'0080 0408)
DM59ITMK (H'0080 0409)
DMA9UDF
Data bus
DMITST9
F/F
5-source inputs
b3
DMA transfer interrupt request 1
DMITMK9
F/F
(Level)
b11
DMA8UDF
b4
DMITST8
F/F
DMITMK8
F/F
b12
DMA7UDF
b5
DMITST7
F/F
DMITMK7
F/F
b13
DMA6UDF
DMITST6
F/F
b6
DMITMK6
F/F
b14
DMA5UDF
b7
DMITST5
F/F
DMITMK5
F/F
b15
Figure 9.2.5 Block Diagram of DMA Transfer Interrupt Request 1
32180 Group User’s Manual (Rev.1.0)
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