DMAC
9.2 DMAC Related Registers
9
DMA0–4 Interrupt Request Mask Register (DM04ITMK)
<Address: H’0080 0401>
b8
0
9
0
10
0
11
12
13
14
b15
DMITMK4 DMITMK3 DMITMK2 DMITMK1 DMITMK0
0
0
0
0
0
<After reset: H’00>
b
Bit Name
No function assigned. Fix to "0".
Function
R
0
W
0
8–10
11
DMITMK4 (DMA4 interrupt request mask bit)
DMITMK3 (DMA3 interrupt request mask bit)
DMITMK2 (DMA2 interrupt request mask bit)
DMITMK1 (DMA1 interrupt request mask bit)
DMITMK0 (DMA0 interrupt request mask bit)
0: Enable interrupt request
R
W
12
1: Mask (disable) interrupt request
13
14
15
DMA5–9 Interrupt Request Mask Register (DM59ITMK)
<Address: H’0080 0409>
b8
0
9
0
10
0
11
12
13
14
b15
DMITMK9 DMITMK8 DMITMK7 DMITMK6 DMITMK5
0
0
0
0
0
<After reset: H’00>
b
Bit Name
No function assigned. Fix to "0".
Function
R
0
W
0
8–10
11
DMITMK9 (DMA9 interrupt request mask bit)
DMITMK8 (DMA8 interrupt request mask bit)
DMITMK7 (DMA7 interrupt request mask bit)
DMITMK6 (DMA6 interrupt request mask bit)
DMITMK5 (DMA5 interrupt request mask bit)
0: Enable interrupt request
R
W
12
1: Mask (disable) interrupt request
13
14
15
The DMA Interrupt Request Mask Register is used to mask interrupt requests on each DMA channel.
(1) DMITMKn (DMAn Interrupt Request Mask) bit (n = 0–9)
Setting the DMAn interrupt request mask bit to "1" masks the interrupt requests on DMAn channel. However,
if an interrupt request occurs, the DMAn interrupt request status bit is always set to "1" irrespective of the
contents of this mask register.
32180 Group User’s Manual (Rev.1.0)
9-25
RENESAS [ RENESAS TECHNOLOGY CORP ]
