M32C/83 Group (M32C/83, M32C/83T)
Vcc=5V
Memory Expansion Mode and Microprocessor Mode
Refresh Timing (CAS-before-RAS refresh)
BCLK
tcyc
td(BCLK-RAS)
18ns.max
RAS
th(BCLK-RAS)
-3ns.min
tsu(CAS-RAS)(1)
CASL
CASH
td(BCLK-CAS)
18ns.max
th(BCLK-CAS)
-3ns.min
DW
NOTES :
1. Varies with operation frequency:
su(CAS-RAS)=(tcyc/2-13)ns.min
t
Refresh Timing (Self-refresh)
BCLK
tcyc
td(BCLK-RAS)
18ns.max
RAS
th(BCLK-RAS)
-3ns.min
tsu(CAS-RAS)(2)
CASL
CASH
th(BCLK-CAS)
-3ns.min
td(BCLK-CAS)
18ns.max
DW
NOTES:
2. Varies with operation frequency:
su(CAS-RAS)=(tcyc/2-13)ns.min
t
Measurement Conditions:
• VCC=4.2 to 5.5V
• Input high and low voltage: VIH=2.5V, VIL=0.8V
• Output high and low voltage: VOH=2.0V, VOL=0.8V
Figure 5.7 VCC=5V Timing Diagram (6)
Page 61
Rev. 1.41 Jan.31, 2006
REJ03B0013-0141
of 91
RENESAS [ RENESAS TECHNOLOGY CORP ]
