Table 1.4 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Reset
SRAM DRAM SDRAM PCMCIA MPX
176 F16 MD0/SCK I/O
Mode/SCI1
clock
MD0
SCK
SCK
SCK
SCK
SCK
177 C15 MD1/TXD2 I/O
Mode/SCIF
data output
MD1
MD2
TXD2
RXD2
TXD2
RXD2
TXD2
RXD2
TXD2
RXD2
TXD2
RXD2
178 E15 MD2/RXD2
I
Mode/SCIF
data input
179 D15 ,5/3
180 D17 ,5/4
181 A17 ,5/5
182 B17 ,5/6
183 C16 NMI
I
I
I
I
I
Interrupt 0
Interrupt 1
Interrupt 2
Interrupt 3
Nonmaskable
interrupt
184 A15 XTAL2
185 A16 EXTAL2
186 A14 VSS-RTC
O
I
RTC crystal
resonator pin
RTC crystal
resonator pin
Power RTC GND
(0 V)
187 C14 VDD-RTC Power RTC VDD
(3.3 V)
188 B13 CA
I
Hardware
standby request
189 C13 VDDQ
Power IO VDD (3.3 V)
190 D13 &765
I/O
SCIF data control
(&76)
191 A13 TCLK
I/O
RTC/TMU
clock
192 D12 MD8/5765 I/O
Mode/SCIF data MD8
control (576)
5765
5765
5765
5765
5765
193 C12 VDDQ
194 D14 VSSQ
195 B12 MD7/TXD
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
I
Mode/SCI1 data MD7
output
TXD
TXD
TXD
TXD
TXD
196 E12 SCK2/
SCIF clock/
05(6(7 SCK2
SCK2
SCK2
SCK2
SCK2
05(6(7
manual reset
197 A12 VDD
Power Internal VDD
(1.5 V)
Rev. 6.0, 07/02, page 37 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
