Table 1.4 Pin Functions (cont)
Memory Interface
Pin
No. No. Pin Name I/O
Function
Reset
SRAM DRAM SDRAM PCMCIA MPX
227 E6
$6(%5./
I/O
Pin break/
acknowledge
(H-UDI)
BRKACK
228 A6
229 D7
230 B7
TDO
VDD
VSS
O
Data out
(H-UDI)
Power Internal VDD
(1.5 V)
Power Internal GND
(0 V)
231 E5
232 C6
233 D6
234 A5
235 D5
TMS
I
I
I
I
I
Mode (H-UDI)
Clock (H-UDI)
Data in (H-UDI)
Reset (H-UDI)
TCK
TDI
7567
&.,25(1%
CKIO2, 5'5,
RD/:55 enable
236 B6
237 C3
238 C5
239 C4
240 A4
241 A1
242 A2
243 A3
VDD-PLL2 Power PLL2 VDD (3.3V)
VSS-PLL2 Power PLL2 GND (0V)
VDD-PLL1 Power PLL1 VDD (3.3V)
VSS-PLL1 Power PLL1 GND (0V)
VDD-CPG Power CPG VDD (3.3V)
VSS-CPG Power CPG GND (0V)
XTAL
O
I
Crystal resonator
EXTAL
External clock/
crystal resonator
244 B3
245 B4
246 B5
NC-1
NC-2
NC-3
247 B14 NC-4
248 B15 NC-5
249 B16 NC-6
250 C1
NC-7
251 C17 NC-8
252 D1
253 D2
NC-9
NC-10
254 D16 NC-11
255 E16 NC-12
Rev. 6.0, 07/02, page 39 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
