21.3
Operation
21.3.1 TAP Control
Figure 21.2 shows the internal states of the TAP control circuit. These conform to the state
transitions specified by JTAG.
•
•
•
The transition condition is the TMS value at the rising edge of TCK.
The TDI value is sampled at the rising edge of TCK, and shifted at the falling edge.
The TDO value changes at the falling edge of TCK. When not in the Shift-DR or Shift-IR
state, TDO is in the high-impedance state.
•
In a transition to 7567 = 0, a transition is made to the Test-Logic-Reset state asynchronously
with respect to TCK.
1
0
Test-Logic-Reset
0
1
1
1
Run-Test/Idle
Select-DR-Scan
Select-IR-Scan
0
0
1
1
Capture-DR
0
Capture-IR
0
0
0
0
0
Shift-DR
Shift-IR
1
1
1
1
Exit1-DR
Exit1-IR
0
0
Pause-DR
1
Pause-IR
1
0
0
Exit2-DR
1
Exit2-IR
1
Update-DR
Update-IR
0
0
1
1
Figure 21.2 TAP Control State Transition Diagram
Rev. 6.0, 07/02, page 810 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
