Table 21.3 Configuration of the Boundary Scan Register (1)
No. Pin Name
from TDI
Type
No. Pin Name
309 A19
Type
OUT
CTL
OUT
IN
No. Pin Name
272 D48
271 D62
270 D62
269 D62
268 D49
267 D49
266 D49
265 D61
264 D61
263 D61
262 D50
261 D50
260 D50
259 D60
258 D60
257 D60
256 D51
255 D51
254 D51
253 D59
252 D59
251 D59
250 D52
249 D52
248 D52
247 D58
246 D58
245 D58
244 D53
243 D53
242 D53
241 D57
240 D57
239 D57
238 D54
237 D54
236 D54
Type
OUT
IN
345 &.,25(1%
344 MD6/,2,649
343 STATUS1
342 STATUS1
341 STATUS0
340 STATUS0
339 A1
IN
308 A18
IN
307 A18
CTL
OUT
IN
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
IN
306 SCK2/05(6(7
305 SCK2/05(6(7
304 SCK2/05(6(7
303 MD7/TXD
302 MD7/TXD
301 MD7/TXD
300 MD8/RTS2
299 MD8/RTS2
298 MD8/RTS2
297 TCLK
CTL
OUT
IN
CTL
OUT
IN
CTL
OUT
IN
338 A1
CTL
OUT
IN
337 A0
336 A0
CTL
OUT
IN
335 DACK1
334 DACK1
333 DACK0
332 DACK0
331 MD5/5$65
330 MD5/5$65
329 MD5/5$65
328 MD4/&(5%
327 MD4/&(5%
326 MD4/&(5%
325 MD3/&(5$
324 MD3/&(5$
323 MD3/&(5$
322 A25
CTL
OUT
IN
296 TCLK
CTL
OUT
IN
295 TCLK
CTL
OUT
IN
294 CTS2
CTL
OUT
IN
293 CTS2
CTL
OUT
IN
292 CTS2
CTL
OUT
IN
291 NMI
CTL
OUT
IN
290 ,5/6
IN
289 ,5/5
IN
CTL
OUT
IN
288 ,5/4
IN
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
287 ,5/3
IN
286 MD2/RXD2
285 MD1/TXD2
284 MD1/TXD2
283 MD1/TXD2
282 MD0/SCK
281 MD0/SCK
280 MD0/SCK
279 RD/:55
278 RD/:55
277 D63
IN
CTL
OUT
IN
IN
321 A25
CTL
OUT
IN
320 A24
CTL
OUT
IN
319 A24
318 A23
CTL
OUT
CTL
OUT
IN
317 A23
CTL
OUT
IN
316 A22
315 A22
314 A21
CTL
OUT
IN
313 A21
276 D63
CTL
OUT
IN
312 A20
275 D63
311 A20
274 D48
CTL
OUT
310 A19
273 D48
CTL
Note: CTL is an active-low signal. The relevant pin is driven to the OUT state when CTL is set LOW.
Rev. 6.0, 07/02, page 807 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
