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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Table 17.5 Examples of Bit Rate B (bits/s) for Various SCBRR1 Settings (When n = 0)  
Pφ (MHz)  
N
0
1
2
7.1424  
9600.0  
4800.0  
3200.0  
10.00  
10.7136  
14400.0  
7200.0  
4800.0  
14.2848  
19200.0  
9600.0  
6400.0  
25.0  
33.0  
50.0  
13440.9  
6720.4  
4480.3  
33602.2  
16801.1  
11200.7  
44354.8  
22177.4  
14784.9  
67204.3  
33602.2  
22401.4  
Note: Bit rates are rounded to one decimal place.  
The method of calculating the value to be set in the bit rate register (SCBRR1) from the peripheral  
module operating frequency and bit rate is shown below. Here, N is an integer in the range 0 N ≤  
255, and the smaller error is specified.  
P
φ
N =  
× 106 – 1  
1488 × 22n–1 × B  
Table 17.6 Examples of SCBRR1 Settings for Bit Rate B (bits/s) (When n = 0)  
Pφ (MHz)  
7.1424  
Error  
0.00  
10.00  
Error  
30.00  
10.7136  
Error  
14.2848  
Error  
8.99  
25.00  
Error  
14.27  
33.00  
Error  
8.22  
50.00  
Error  
0.01  
Bits/s  
N
N
N
N
N
N
N
9600  
0
1
1
25.00  
1
3
4
6
Table 17.7 Maximum Bit Rate at Various Frequencies (Smart Card Interface Mode)  
Pφ (MHz)  
7.1424  
10.00  
10.7136  
16.00  
20.00  
25.0  
Maximum Bit Rate (bits/s)  
N
0
0
0
0
0
0
0
0
0
n
0
0
0
0
0
0
0
0
0
19200  
26882  
28800  
43010  
53763  
67204  
80645  
88710  
67204  
30.0  
33.0  
50.0  
Rev. 6.0, 07/02, page 716 of 986  
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