13.2.6 Wait Control Register 2 (WCR2)
Wait control register 2 (WCR2) is a 32-bit readable/writable register that specifies the number of
wait states to be inserted for each area. It also specifies the data access pitch when performing
burst memory access. This enables low-speed memory to be connected without using external
circuitry.
WCR2 is initialized to H'FFFEEFFF by a power-on reset, but is not initialized by a manual reset
or in standby mode.
Bit:
31
30
A6W1
1
29
A6W0
1
28
A6B2
1
27
A6B1
1
26
A6B0
1
25
A5W2
1
24
A5W1
1
Bit name: A6W2
Initial value:
R/W:
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
23
22
A5B2
1
21
A5B1
1
20
A5B0
1
19
A4W2
1
18
A4W1
1
17
A4W0
1
16
—
0
Bit name: A5W0
Initial value:
R/W:
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Bit:
15
14
A3W1
1
13
A3W0
1
12
—
0
11
A2W2
1
10
A2W1
1
9
A2W0
1
8
A1W2
1
Bit name: A3W2
Initial value:
R/W:
1
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
Bit:
7
6
A1W0
1
5
A0W2
1
4
A0W1
1
3
A0W0
1
2
A0B2
1
1
A0B1
1
0
A0B0
1
Bit name: A1W1
Initial value:
R/W:
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 6.0, 07/02, page 343 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
