1. General Pipeline
I
D
S
NA
EX
• Instruction fetch • Instruction
• Operation
• Non-memory
data access
• Write-back
decode
• Issue
• Register read
• Destination address calculation
for PC-relative branch
2. General Load/Store Pipeline
I
D
S
MA
EX
• Address
• Instruction fetch • Instruction
• Memory
• Write-back
decode
calculation
data access
• Issue
• Register read
3. Special Pipeline
I
D
S
NA
SX
• Instruction fetch • Instruction
• Operation
• Non-memory
data access
• Write-back
decode
• Issue
• Register read
4. Special Load/Store Pipeline
I
D
S
MA
SX
• Instruction fetch • Instruction
• Address
calculation
• Memory
data access
• Write-back
decode
• Issue
• Register read
5. Floating-Point Pipeline
I
D
FS
F2
F1
• Instruction fetch • Instruction
• Computation 1 • Computation 2
• Computation 3
• Write-back
decode
• Issue
• Register read
6. Floating-Point Extended Pipeline
I
D
F2
F1
F0
FS
• Instruction fetch • Instruction
• Computation 0 • Computation 1
• Computation 2 • Computation 3
• Write-back
decode
• Issue
• Register read
7. FDIV/FSQRT Pipeline
F3
Computation: Takes several cycles
Figure 8.1 Basic Pipelines
Rev. 6.0, 07/02, page 194 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
